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Channel Coding

Channel Coding. NCU-EE VLSI/DSP Lab. Freshman Training Course Speaker : 林承鴻 Advisor: 蔡宗漢 博士. Outline. Overview of Channel coding Digital Communication System Types of Error Control Types of Channel Coding Turbo Codes Introduction System model Log-MAP vs SOVA Simulation

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Channel Coding

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  1. Channel Coding NCU-EE VLSI/DSP Lab. Freshman Training Course Speaker : 林承鴻 Advisor: 蔡宗漢 博士

  2. Outline • Overview of Channel coding • Digital Communication System • Types of Error Control • Types of Channel Coding • Turbo Codes • Introduction • System model • Log-MAP vs SOVA • Simulation • SW – Memory Architectures • Conclusions

  3. Digital Communication System JPEG, MPEG, etc. RS code, Turbo code, QPSK, QAM, BPSK, etc. rb rc Information Source Channel Modulator Source Encoder Encoder rs Channel Source Channel Demodu- Data Sink Decoder Decoder lator

  4. Channel Coding • Channel coding refers to the class of signal transformation designed to improve communication performance by enabling the transmitted signals to better withstand the effects of various channel impairments. • Channel coding can be partitioned into two areas, waveform (or signal design) coding and structured sequences (or structured redundancy.) • Waveform coding deals with transforming waveforms into “better waveforms,” to make the detection process less subject to errors. • Structured sequence deals with transforming data sequences into “better sequences,” having structured redundancy.

  5. Types of Error Control • Before we discuss the detail of structured redundancy, let us describe the two basic ways such redundancy is used for controlling errors. • Error detection and retransmission, utilizes parity bits (redundant bits added to data) to detect that an error has been made and requires two-way link for dialogue between the transmitter and receiver. • Forward error correction (FEC), requires a one way link only, since in this case the parity bit are designed for both the detection and correction of errors.

  6. Why Use Error-Correction Coding • Trade-off: • Error Performance verse Bandwidth • Power verse Bandwidth • Data Rate verse Bandwidth • Capacity verse Bandwidth • Coded verse Uncoded Performance • Coding Gains • For a given bit-error probabilities, coding gain is defined as the reduction in Eb/N0 that can be realized through the use of code.

  7. Types of Channel Coding • Block codes • Extended Golay code • Hamming code • BCH code • Convolutional codes • Recursive or Nonrecursive • Systematic or Nonsystematic • Reed-Solomon Codes • Interleaving and Concatenated Codes • Turbo Codes

  8. (6,3) Binary Block Code Messages Code words (0 0 0) (0 0 0 0 0 0) (1 0 0) (1 1 0 1 0 0) (0 1 0) (0 1 1 0 1 0) (1 1 0) (1 0 1 1 1 0) (0 0 1) (1 1 1 0 0 1) (1 0 1) (0 0 1 1 0 1) (0 1 1) (1 0 0 0 1 1) (1 1 1) (0 1 0 1 1 1) Block Codes • (n,k) Block Codes • message :k-tuple u=(u1,u2,…,uk) • code word :n-tuple v=(v1,v2,…,vn) • code rate :R=k/n

  9. (2,1,2) Convolutional Code u2 s2 s1 Input bit b D D u1 Convolustional Codes • (n,k,m) Convolutional Codes • message : k-tuple u=(u1,u2,…,uk) • code word : n-tuple v=(v1,v2,…,vn) • code rate : R=k/n • memory order :m • Constraint length :K=m+1 • Generator polynomials : g1(x)= 1+x+x2; g2(x)=1+x2

  10. Outline • Overview of Channel coding • Digital Communication System • Types of Error Control • Types of Channel Coding • Turbo Codes • Introduction • System model • Log-MAP vs SOVA • Simulation • SW – Memory Architectures • Conclusions

  11. Turbo Codes • Shannon’s channel coding theorem guarantees the existence of codes that can achieve arbitrary small probability of error if the data transmission rate is smaller than the channel capacity.

  12. Applications • Turbo code is currently adopted as the channel coding schemes in many next-generation communication systems • WCDMA, CDMA2000 • CCSDS in space communications • Baseband Signal compensation in Fiber transmission systems

  13. Specifications in WCDMA

  14. Specification in CDMA2000

  15. Turbo Code v.s. Convolutional Code Convolutional Code • Non-recursive • Non-systematic • Without Interleaver Turbo Code • Recursive • Systematic • Parallel structure • Use Interleaver NSC RSC

  16. Design Architecture Place & Route Design Specification Behavior Level Simulation Dracula DRC, LVS, LPE High Level Simulation Synthesis & Gate Simulation Post-Layout Simulation Tap out Design Flow

  17. Memoryless Noise Parallel-to-serial BPSK Modulator RSC1 Puncturing Interleaver RSC1 Denterlever Serial-to-parallel Interlever Decoder 1 Decoder 2 BPSK Demodulator Interlever Hard Decision Denterlever System Model

  18. Log-MAP vs SOVA G=[7 5], Unpunctured(1/3), frame size=1024, Iteration=8. Iteration increment.. SOVA Iteration increment.. Log_MAP

  19. Input symbols ‧‧‧ ‧‧‧ Trace back Store sign Delay Line ‧‧‧ weight ML path Competitor path The SOVA algorithm

  20. |x-y| 0~0.25 0.25~0.5 0.5~0.75 0.75~1 1~1.25 1.25~1.5 1.5~2 >2 ln(1+e-|x-y|) 0.75 0.5 0.5 0.5 0.25 0.25 0.25 0 Log-MAP Algorithms

  21. Log-MAP Algorithms

  22. Sliding Window – Memory Issue • The extrinsic and APP value are made with a delay, which is equal to received sequence length. • But the decoder decisions length can be reduced to about six times the encoder memory because of reliable decoding decision.

  23. Simulation Results (1/3)

  24. Iteration 4 Iteration 2 Iteration 8 Iteration 7 Iteration 6 Iteration 5 Iteration 1 Iteration 3 Simulation Results (2/3)

  25. Simulation Results (3/3)

  26. RAM A RAM3 RAM2 RAM1 MUX MUX MUX MUX MUX ACS α MUX MUX ACS β ACS β ACS u ACS c SW - Memory Architectures • Advantage: 1 Less memory size. 2. Might be Lower latency. • Disadvantage: 1.Read-modify-write access required for the memory. 2.Address is hard to be controlled.

  27. Timing Diagram

  28. Position VS Time A DO B0 B1 G Decode output without LIFO Decode output with LIFO

  29. ACS Unit *Add-compare-select (ACS) Unit:

  30. Forward / Backward Processor Trellis States: Forward Processor (A) / Backward Processor (B) Block Diagram: Block Diagram based on Trellis States:

  31. Novel Turbo Code – Iteration Issues • In high-quality channel environments, a large of decoding iterations are not required to obtain the target BER, and it is possible to terminate the process after a few numbers of decoding iterations. Denterlever SISO (MAP1) Decoder SISO (MAP2) Decoder Interlever Threshold Detection Hard Decision Denterlever

  32. Outline • Overview of Channel coding • Digital Communication System • Types of Error Control • Types of Channel Coding • Turbo Codes • Introduction • System model • Log-MAP vs SOVA • Simulation • SW – Memory Architectures • Conclusions

  33. Conclusions • We discuss some fundamentals of channel coding. • We discuss some basic implementation issues for turbo codes. • This study can be exploited in development of high performance receiver with different constraints of cost and throughput. • The novel turbo decoder can practically have lower iteration with the adaptive SNR channel estimation.

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