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ECE 15B Computer Organization Spring 2011 Dmitri Strukov. Partially adapted from Computer Organization and Design, 4 th edition, Patterson and Hennessy,. Agenda. Recursive function (correction to the last lecture) Wrap-up of HW part (except for floating point) Instruction formats
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ECE 15B Computer OrganizationSpring 2011Dmitri Strukov Partially adapted from Computer Organization and Design, 4th edition, Patterson and Hennessy,
Agenda • Recursive function (correction to the last lecture) Wrap-up of HW part (except for floating point) • Instruction formats • Addressing modes ECE 15B Spring 2011
Fibonacci numbers F(n) = F(n-1)+F(n-2) F(1) = 1 F(2) = 1 n = 1 2 3 4 5 6 … F(n) = 1 1 2 3 5 8 … /* Recursive function in c */ int fib(int n) { If (n==1) return 1; If (n==2) return 1; return fib(n-1)+fib(n-2); } ECE 15B Spring 2011
Procedures Prolog - spill all register to stack used by procedure expect for $t0-$t9 and the one used for returning values - advance stack pointer ($sp) first then write to stack Body code of the procedure Epilog - restore all used registers - adjust stack pointer at the end ($sp) ECE 15B Spring 2011
# Recursive function in MIPS assembler • #prolog • FIB: addi $sp, $sp, -12 • sw $a0, 0($sp) • sw $s0, 4($sp) • sw $ra, 8($ra) • # body • addi $v0, $zero, 1 • addi $t0, $zero, 1 • beq $a0, $t0, EPILOG #check for n==1 • addi $t0, $zero, 2 • beq $a0, $t0, EPILOG #check for n==2 • addi $a0, $a0, -1 • jal FIB #calculate fib(n-1) • addi $s0, $zero, $v0 # save fib(n-1) to $s0 • addi $a0, $a0, -1 #calculate fib(n-2) • jal FIB • addi $v0, $v0, $s0 • #epilog • EPILOG: lw $a0, 0($sp) • lw $s0, 4,($sp) • lw $ra, 8,($sp) • addi $sp, $sp, 12 • jr $ra /* Recursive function in c */ int fib(int n) { If (n==1) return 1; If (n==2) return 1; return fib(n-1)+fib(n-2); } /* Recursive function in c */ int fib(int n) { v0 = 1; If (n==1) goto EXIT; If (n==2) goto EXIT; n = n – 1; s0 = fib(n); n = n – 1; v0 = fib(n); v0 = v0 +s0; EXIT: return v0; } ECE 15B Spring 2011
# Recursive function in MIPS assembler • #prolog • FIB: addi $sp, $sp, -12 • sw $a0, 0($sp) • sw $s0, 4($sp) • sw $ra, 8($ra) • # body • addi $v0, $zero, 1 • addi $t0, $zero, 1 • beq $a0, $t0, EPILOG #check for n==1 • addi $t0, $zero, 2 • beq $a0, $t0, EPILOG #check for n==2 • addi $a0, $a0, -1 • jal FIB #calculate fib(n-1) • addi $s0, $zero, $v0 # save fib(n-1) to $s0 • addi $a0, $a0, -1 #calculate fib(n-2) • jal FIB • addi $v0, $v0, $s0 • #epilog • EPILOG: lw $a0, 0($sp) • lw $s0, 4,($sp) • lw $ra, 8,($sp) • addi $sp, $sp, 12 • jr $ra /* Recursive function in c */ int fib(int n) { If (n==1) return 1; If (n==2) return 1; return fib(n-1)+fib(n-2); } /* Recursive function in c */ int fib(int n) { v0 = 1; If (n==1) goto EXIT; If (n==2) goto EXIT; n = n – 1; s0 = fib(n); n = n – 1; v0 = fib(n); v0 = v0 +s0; EXIT: return v0; } ECE 15B Spring 2011
Now let’s see changes in the memory (stack) and register file as we execute recursive function with n = 3 • First let’s review datapath and where code is stored ECE 15B Spring 2011
Simple datapath review ECE 15B Spring 2011
Simple datapath review stack instructions ECE 15B Spring 2011
Where is the code stored? stack stack RF[$sp] dynamic data (heap) static data Code (????) 0 ANS: In main memory ECE 15B Spring 2011
Instruction memory stack IM: Physically different memory Logically mapped to main memory dynamic data (heap) static data code ECE 15B Spring 2011
Direct mapped cache implementation of instruction memory At any point in time IM has a copy of a portion of main memory Main memory Main Separate memory (tag) to store which location is currently mapped If upper portion of PC (28 bit) matches tag then IM has right values (hit), otherwise stop execution and load right portion 24 Instruction memory Tag (28 bit) 16 0 ECE 15B Spring 2011
Recursive function execution: step by step RF (right after execution of initial jal FIB at 0x0104) MM (initial values in stack) • 0x0100addi $a0, $zero, 3 • 0x0104 jal FIB • 0x0108 next instruction • XXXXXXXXXXXXXXXXXXXXXX • FIB: 0x1000addi $sp, $sp, -12 • 0x1004 sw $a0, 0($sp) • 0x1008 sw $s0, 4($sp) • 0x100C sw $ra, 8($ra) • 0x1010 addi $v0, $zero, 1 • 0x1014 addi $t0, $zero, 1 • 0x1018 beq $a0, $t0, EPILOG • 0x101C addi $t0, $zero, 2 • 0x1020 beq $a0, $t0, EPILOG • 0x1024 addi $a0, $a0, -1 • 0x1028 jal FIB • 0x102C addi $s0, $zero, $v0 • 0x1030 addi $a0, $a0, -1 • 0x1034 jal FIB • 0x1038 addi $v0, $v0, $s0 • EPILOG: 0x103Clw $a0, 0($sp) • 0x1040 lw $s0, 4,($sp) • 0x1044 lw $ra, 8,($sp) • 0x1048 addi $sp, $sp, 12 • 0x104C jr $ra ECE 15B Spring 2011
Recursive function execution: step by step RF (after execution jal FIB at 0x1028) MM - stack • 0x0100addi $a0, $zero, 3 • 0x0104 jal FIB • 0x0108 next instruction • XXXXXXXXXXXXXXXXXXXXXX • FIB: 0x1000addi $sp, $sp, -12 • 0x1004 sw $a0, 0($sp) • 0x1008 sw $s0, 4($sp) • 0x100C sw $ra, 8($ra) • 0x1010 addi $v0, $zero, 1 • 0x1014 addi $t0, $zero, 1 • 0x1018 beq $a0, $t0, EPILOG • 0x101C addi $t0, $zero, 2 • 0x1020 beq $a0, $t0, EPILOG • 0x1024 addi $a0, $a0, -1 • 0x1028 jal FIB • 0x102C addi $s0, $zero, $v0 • 0x1030 addi $a0, $a0, -1 • 0x1034 jal FIB • 0x1038 addi $v0, $v0, $s0 • EPILOG: 0x103Clw $a0, 0($sp) • 0x1040 lw $s0, 4,($sp) • 0x1044 lw $ra, 8,($sp) • 0x1048 addi $sp, $sp, 12 • 0x104C jr $ra ECE 15B Spring 2011
Recursive function execution: step by step RF (after execution beq at 0x1020) MM - stack • 0x0100addi $a0, $zero, 3 • 0x0104 jal FIB • 0x0108 next instruction • XXXXXXXXXXXXXXXXXXXXXX • FIB: 0x1000addi $sp, $sp, -12 • 0x1004 sw $a0, 0($sp) • 0x1008 sw $s0, 4($sp) • 0x100C sw $ra, 8($ra) • 0x1010 addi $v0, $zero, 1 • 0x1014 addi $t0, $zero, 1 • 0x1018 beq $a0, $t0, EPILOG • 0x101C addi $t0, $zero, 2 • 0x1020 beq $a0, $t0, EPILOG • 0x1024 addi $a0, $a0, -1 • 0x1028 jal FIB • 0x102C addi $s0, $zero, $v0 • 0x1030 addi $a0, $a0, -1 • 0x1034 jal FIB • 0x1038 addi $v0, $v0, $s0 • EPILOG: 0x103Clw $a0, 0($sp) • 0x1040 lw $s0, 4,($sp) • 0x1044 lw $ra, 8,($sp) • 0x1048 addi $sp, $sp, 12 • 0x104C jr $ra ECE 15B Spring 2011
Recursive function execution: step by step RF (after execution jr at 0x104C) MM - stack • 0x0100addi $a0, $zero, 3 • 0x0104 jal FIB • 0x0108 next instruction • XXXXXXXXXXXXXXXXXXXXXX • FIB: 0x1000addi $sp, $sp, -12 • 0x1004 sw $a0, 0($sp) • 0x1008 sw $s0, 4($sp) • 0x100C sw $ra, 8($ra) • 0x1010 addi $v0, $zero, 1 • 0x1014 addi $t0, $zero, 1 • 0x1018 beq $a0, $t0, EPILOG • 0x101C addi $t0, $zero, 2 • 0x1020 beq $a0, $t0, EPILOG • 0x1024 addi $a0, $a0, -1 • 0x1028 jal FIB • 0x102C addi $s0, $zero, $v0 • 0x1030 addi $a0, $a0, -1 • 0x1034 jal FIB • 0x1038 addi $v0, $v0, $s0 • EPILOG: 0x103Clw $a0, 0($sp) • 0x1040 lw $s0, 4,($sp) • 0x1044 lw $ra, 8,($sp) • 0x1048 addi $sp, $sp, 12 • 0x104C jr $ra ECE 15B Spring 2011
Recursive function execution: step by step RF (after execution jal at 0x1034) MM - stack • 0x0100addi $a0, $zero, 3 • 0x0104 jal FIB • 0x0108 next instruction • XXXXXXXXXXXXXXXXXXXXXX • FIB: 0x1000addi $sp, $sp, -12 • 0x1004 sw $a0, 0($sp) • 0x1008 sw $s0, 4($sp) • 0x100C sw $ra, 8($ra) • 0x1010 addi $v0, $zero, 1 • 0x1014 addi $t0, $zero, 1 • 0x1018 beq $a0, $t0, EPILOG • 0x101C addi $t0, $zero, 2 • 0x1020 beq $a0, $t0, EPILOG • 0x1024 addi $a0, $a0, -1 • 0x1028 jal FIB • 0x102C addi $s0, $zero, $v0 • 0x1030 addi $a0, $a0, -1 • 0x1034 jal FIB • 0x1038 addi $v0, $v0, $s0 • EPILOG: 0x103Clw $a0, 0($sp) • 0x1040 lw $s0, 4,($sp) • 0x1044 lw $ra, 8,($sp) • 0x1048 addi $sp, $sp, 12 • 0x104C jr $ra ECE 15B Spring 2011
Recursive function execution: step by step RF (after execution beq at 0x1018) MM - stack • 0x0100addi $a0, $zero, 3 • 0x0104 jal FIB • 0x0108 next instruction • XXXXXXXXXXXXXXXXXXXXXX • FIB: 0x1000addi $sp, $sp, -12 • 0x1004 sw $a0, 0($sp) • 0x1008 sw $s0, 4($sp) • 0x100C sw $ra, 8($ra) • 0x1010 addi $v0, $zero, 1 • 0x1014 addi $t0, $zero, 1 • 0x1018 beq $a0, $t0, EPILOG • 0x101C addi $t0, $zero, 2 • 0x1020 beq $a0, $t0, EPILOG • 0x1024 addi $a0, $a0, -1 • 0x1028 jal FIB • 0x102C addi $s0, $zero, $v0 • 0x1030 addi $a0, $a0, -1 • 0x1034 jal FIB • 0x1038 addi $v0, $v0, $s0 • EPILOG: 0x103Clw $a0, 0($sp) • 0x1040 lw $s0, 4,($sp) • 0x1044 lw $ra, 8,($sp) • 0x1048 addi $sp, $sp, 12 • 0x104C jr $ra ECE 15B Spring 2011
Recursive function execution: step by step RF (after execution jr at 0x104C) MM - stack • 0x0100addi $a0, $zero, 3 • 0x0104 jal FIB • 0x0108 next instruction • XXXXXXXXXXXXXXXXXXXXXX • FIB: 0x1000addi $sp, $sp, -12 • 0x1004 sw $a0, 0($sp) • 0x1008 sw $s0, 4($sp) • 0x100C sw $ra, 8($ra) • 0x1010 addi $v0, $zero, 1 • 0x1014 addi $t0, $zero, 1 • 0x1018 beq $a0, $t0, EPILOG • 0x101C addi $t0, $zero, 2 • 0x1020 beq $a0, $t0, EPILOG • 0x1024 addi $a0, $a0, -1 • 0x1028 jal FIB • 0x102C addi $s0, $zero, $v0 • 0x1030 addi $a0, $a0, -1 • 0x1034 jal FIB • 0x1038 addi $v0, $v0, $s0 • EPILOG: 0x103Clw $a0, 0($sp) • 0x1040 lw $s0, 4,($sp) • 0x1044 lw $ra, 8,($sp) • 0x1048 addi $sp, $sp, 12 • 0x104C jr $ra ECE 15B Spring 2011
Recursive function execution: step by step RF (after execution jr at 0x104C) MM - stack • 0x0100addi $a0, $zero, 3 • 0x0104 jal FIB • 0x0108 next instruction • XXXXXXXXXXXXXXXXXXXXXX • FIB: 0x1000addi $sp, $sp, -12 • 0x1004 sw $a0, 0($sp) • 0x1008 sw $s0, 4($sp) • 0x100C sw $ra, 8($ra) • 0x1010 addi $v0, $zero, 1 • 0x1014 addi $t0, $zero, 1 • 0x1018 beq $a0, $t0, EPILOG • 0x101C addi $t0, $zero, 2 • 0x1020 beq $a0, $t0, EPILOG • 0x1024 addi $a0, $a0, -1 • 0x1028 jal FIB • 0x102C addi $s0, $zero, $v0 • 0x1030 addi $a0, $a0, -1 • 0x1034 jal FIB • 0x1038 addi $v0, $v0, $s0 • EPILOG: 0x103Clw $a0, 0($sp) • 0x1040 lw $s0, 4,($sp) • 0x1044 lw $ra, 8,($sp) • 0x1048 addi $sp, $sp, 12 • 0x104C jr $ra ECE 15B Spring 2011
Recursive function execution: step by step RF (at the end of program) MM - stack • 0x0100addi $a0, $zero, 3 • 0x0104 jal FIB • 0x0108 next instruction • XXXXXXXXXXXXXXXXXXXXXX • FIB: 0x1000addi $sp, $sp, -12 • 0x1004 sw $a0, 0($sp) • 0x1008 sw $s0, 4($sp) • 0x100C sw $ra, 8($ra) • 0x1010 addi $v0, $zero, 1 • 0x1014 addi $t0, $zero, 1 • 0x1018 beq $a0, $t0, EPILOG • 0x101C addi $t0, $zero, 2 • 0x1020 beq $a0, $t0, EPILOG • 0x1024 addi $a0, $a0, -1 • 0x1028 jal FIB • 0x102C addi $s0, $zero, $v0 • 0x1030 addi $a0, $a0, -1 • 0x1034 jal FIB • 0x1038 addi $v0, $v0, $s0 • EPILOG: 0x103Clw $a0, 0($sp) • 0x1040 lw $s0, 4,($sp) • 0x1044 lw $ra, 8,($sp) • 0x1048 addi $sp, $sp, 12 • 0x104C jr $ra ECE 15B Spring 2011
Is code optimal? * No need to spill registers when n = 1 and n = 2 * F(n-2) is calculated independently of F(n-1). Better version could be (which is linear in time with n): int fib(int a, int b, int n) { if (n==2) return a; else return fib(a+b, a, n‐1); } …. and use fib(1,1,n) * Even better to use for-loop or do-while ? ECE 15B Spring 2011
Instruction formats ECE 15B Spring 2011
op op rs rs rt rt rd constant or address shamt funct 6 bits 6 bits 5 bits 5 bits 5 bits 5 bits 5 bits 5 bits 16 bits 6 bits op address 26 bits 6 bits Instruction formats R-format: I-format: J-format: ECE 15B Spring 2011
Instruction formats Why stick to fixed formats? rigid and just few formats + fixed instruction size simple decoding faster clock cycle ( hopefully faster execution) note that it is always a tradeoff: too rigid and simple instruction set could be result in the large number of instructions several visual example later… ECE 15B Spring 2011
op rs rt rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits R-format Example add $t0, $s1, $s2 note the order! (green card) special $s1 $s2 $t0 0 add 0 17 18 8 0 32 000000 10001 10010 01000 00000 100000 000000100011001001000000001000002 = 0232402016 ECE 15B Spring 2011
Basic addressing modes Very important aspect of ISA identifying how operands are defined for each operation Typically one (or two) operands is (are) register(s), i.e. general purpose one or PC, while another one is either • Immediate • Register • Memory (may use imm but the actual operand is memory) This how you define basic immediate, register or memory classes of addressing modes ECE 15B Spring 2011
Specific Addressing Mode in MIPS ECE 15B Spring 2011
op rs rt constant or address 6 bits 5 bits 5 bits 16 bits MIPS PC-relative or branch addressing • Branch instructions specify • Opcode, two registers, target address • Most branch targets are near branch • Forward or backward • PC-relative addressing • Target address = PC + offset × 4 • PC already incremented by 4 by this time ECE 15B Spring 2011
op address 26 bits 6 bits Pseudodirect or Jump Addressing • Jump (j and jal) targets could be anywhere in text segment • Encode full address in instruction • (Pseudo)Direct jump addressing • Target address = PC31…28 : (address × 4) ECE 15B Spring 2011
Target Addressing Example • Loop code from earlier example • Assume Loop at location 80000 ECE 15B Spring 2011
Note on the PC incrementing • Technical term for auto-incrementation of PC is “delayed branch” • By default in SPIM “delayed branch” is not checked. To see you SPIM settings look at simulator settings • You can also check it by loading code to SPIM to check main : bne $s0, $s0, main ECE 15B Spring 2011
Branching Far Away • If branch target is too far to encode with 16-bit offset, assembler rewrites the code • Example beq $s0,$s1, L1 ↓ bne $s0,$s1, L2 j L1L2: … ECE 15B Spring 2011
Various specific addressing modes in other ISAs • Absolute address • Immediate data • Inherent address • Register direct • Register indirect • Base register • Register indirect with index register • Register indirect with index register and displacement • Register indirect with index register scaled • Absolute address with index register • Memory indirect • Program counter relative ECE 15B Spring 2011
Example: Basic x86 Addressing Modes • Two operands per instruction • Memory addressing modes • Address in register • Address = Rbase + displacement • Address = Rbase + 2scale× Rindex (scale = 0, 1, 2, or 3) • Address = Rbase + 2scale× Rindex + displacement ECE 15B Spring 2011
Example of decoding and addressing modes in datapath ECE 15B Spring 2011
Simple datapath picture Let’s add more details on this figure to see why instruction decoding could be simple and to see what is happening with for different instructions ECE 15B Spring 2011
Datapath With Control ECE 15B Spring 2011
R-Type Instruction ECE 15B Spring 2011
Load Instruction ECE 15B Spring 2011
Branch-on-Equal Instruction ECE 15B Spring 2011
2 address 31:26 25:0 Implementing Jumps Jump • Jump uses word address • Update PC with concatenation of • Top 4 bits of old PC • 26-bit jump address • 00 • Need an extra control signal decoded from opcode ECE 15B Spring 2011
Datapath With Jumps Added ECE 15B Spring 2011
Advanced Topics:Code density examples ECE 15B Spring 2011
Recent study (2009) ECE 15B Spring 2011
Code density examples ECE 15B Spring 2011