SC+ILP=RC

1. SC+ILP=RC Chris Gniady, Babak Falsafi, and T. N. Vijaykumar February 24th 2006

2. SC – execute memory operations one at a time, in program order • RC – no order unless explicitly requested by software (programmer) • ILP – out of order and speculative execution

3. SC++ - runs like RC, talks like SC • Speculates on all instructions, including stores – RC-like freedom • Detects when SC is violated and recovers • L2 cache must cooperate (memory and remote nodes expect SC)

4. Rollback when speculative block is • Invalidated by DSM directory • Read by remote node • Replaced from L2 cache • Livelock safety • Instruction that caused rollback executed and retired non-speculatively • Deadlock safety • No coherence message processing while in rollback mode

5. SC++ adds hardware – SHiQ and BLT

6. SC + ILP = RC if hardware has • Speculative loads andstores • Enough space for speculative processor and memory state • No slowdown due to added complexity • Infrequent rollbacks in execution

7. Rollback frequency depends on SW • SW can generate high amounts of • Data races • False sharing • Cache conflicts • Argument: such SW is unlikely to benefit from DSM anyway

8. Evaluation using simulation • Scientific code benchmarks • 8 MIPS R10K cores

14. Questions ?