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Lecture 27a: Problem Session. Professor Walter W. Olson Department of Mechanical, Industrial and Manufacturing Engineering University of Toledo. Exercise 1: 1 st Order ZN PID Design. Design a PID controller for the system with a step response below: (lines on next slide).
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Lecture 27a: Problem Session Professor Walter W. Olson Department of Mechanical, Industrial and Manufacturing Engineering University of Toledo
Exercise 1: 1st Order ZN PID Design • Design a PID controller for the system with a step response below: (lines on next slide)
Exercise 1: 1st Order ZN PID Design • Design a PID controller for the system with a step response below:
Exercise 2: Oscillatory ZN PID Design • Design a PI Controller for the following system (Kcr=10):
Exercise 2: Oscillatory ZN PID Design • Design a PI Controller for the following system (Kcr=10): 9 complete cycles in 19 sec
Exercise 3: Lead Design (Root Locus) • Design a lead controller for the open loop system below with unity feedback which will result in a damping ratio of 0.36 while reducing the 5% settling time by 50% Part 1: where would you like to see the closed loop poles?
Exercise 3: Lead Design (Root Locus) Part 1: where would you like to see the closed loop poles? Part 2: Placing a zero and a pole
Exercise 3: Lead Design (Root Locus) Part 2: Placing a zero and a pole Try a zero at -1 and a pole at -10: Need to bend the curve up more
Exercise 3: Lead Design (Root Locus) Part 2: Placing a zero and a pole Try a zero at -1 and a pole at -15: Closer…
Exercise 3: Lead Design (Root Locus) Part 2: Placing a zero and a pole Try a zero at -1 and a pole at -18: Very close: Could fine adjust more Accepting this controller:
Exercise 4: Lead Design (frequency) • For the following system, increase the static velocity error 2.0/sec with a phase margin of 50o:
Exercise 4: Lead Design (frequency) • For the following system, increase the static velocity error 2.0/sec with a phase margin of 50o:
Exercise 4: Lead Design (frequency) • For the following system, increase the static velocity error 2.0/sec with a phase margin of 50o:
Exercise 4: Lead Design (frequency) • For the following system, increase the static velocity error 2.0/sec with a phase margin of 50o: