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Data Link Control

Data Link Control. Flow Control. technique for controlling the data transmission so that receivers have sufficient buffer space to accept before processing common flow control schemes : X-ON and X-OFF Stop-and-Wait Sliding Windows. X-On and X-OFF. transmit. transmit. stop.

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Data Link Control

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  1. Data Link Control

  2. Flow Control • technique for controlling the data transmission so that receivers have sufficient buffer space to accept before processing • common flow control schemes : • X-ON and X-OFF • Stop-and-Wait • Sliding Windows

  3. X-On and X-OFF transmit transmit stop dddddd dddddd sender receiver X-OFF X-ON • receiver sends X-OFF (DC3) if its buffer is full • sender stops sending when receives X-OFF • receiver sends X-ON (DC1) when buffer space becomes available • senders starts sending when receives X-ON

  4. Stop-and-Wait Flow Control receiver sender transmits a frame data i send ACK sends back an acknowledgement to the frame just received acknowledge wait until it receives ACK before sending the next frame data I+1 send

  5. Sliding-Window Flow Control Sender抯 buffer frames that may be tranmitted frames already tranmitted 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 frame sequence number upper window pointer lower window pointer receiver抯 buffer frames that may be accepted frames already received 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 frame sequence number upper window pointer lower window pointer

  6. Sliding-Window example 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0,1,2 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 ACK3 0 1 2 3 4 5 67 0 1 2 3 4 5 6 7 0 1 2 3 4 5 67 0 1 2 3 4 5 6 7 3,4,5,6 0 1 23 4 5 6 7 0 1 2 3 4 5 6 7 0 1 23 4 5 67 0 1 2 3 4 5 6 7 ACK4 0 1 23 4 5 6 7 0 12 3 4 5 6 7 0 1 23 4 5 6 7 0 12 3 4 5 6 7

  7. Error Detection • Parity check • odd or even parity • undetected error, it two or any even number of bits are inverted • CRC • uses dynamic bit pattern attached with data • can detect various errors with appropiated code • all single bit error • all double bit errors • any odd number of errors

  8. CRC concepts M F Given a k-bit block of bits (M), the transmitter generates an n-bit sequence (F), so that the resulting frame, consisting of k+n bits (T), is exactly divisible by some predetermine divisor (P). The receiver then divides the incoming frame (T) by that number (P), if there is no remainder, assume there was no error. n-bit k-bit T T=2nM+F What should be F ? R 2nM Q ,R quotient, remainder Q+ = P is predetermine divisor P P T =2nM+R let F equals R 2nM+R divides T by R T = P P P R R Q T is divisible by P + Q+ = = P P

  9. CRC in polynomials M = 110011 then M(X) = X5 + X4 + X+1 P = 1101 then P(X) = X3+X+1 Standard P(X) CRC-16 = X16+ X15+ X2+1 CRC-CCITT = X16+ X12+ X5+1 CRC-32 = X32+ X26+X23+ X22+ X16+ X12+ X11+ X10+ X8 + X7+ X5 + X4+ + X2+1

  10. Error Control • What is error control • detect and correct errors occurs in transmission • Type of errors • loss frame • damaged frame

  11. Error Control Techiques • Error control techniques • error detection • positive ACK • Retransmission after timeout • Negative ACK • Standard techniques • Stop-and-wait ARQ • Go-back-N ARQ • Selective Repeat ARQ } known as Automatic Repeat Request (ARQ)

  12. Stop-and-Wait ARQ time out time out sender frame I+2 frame i frame I+3 frame I+2 frame I+3 frame I+1 ACK I+1 ACK I+2 ACK I+3 ACK i ACK I+3 receiver frame lost retransmit & duplicate discard ACK lost retransmit

  13. Go-back-N ARQ 6, 7 and 8 retransmitted sender frame 8 frame 5 frame 1 frame 8 frame 4 frame 6 frame 3 frame 7 frame 6 frame 2 frame 7 ACK 4 NACK 6 ACK 9 ACK 6 receiver error 7 and 8 will be discarded

  14. Selective-repeat ARQ only 6 is retransmitted sender frame 5 frame 1 frame 8 frame 4 frame 6 frame 3 frame 9 frame 6 frame 2 frame 10 frame 7 ACK 4 NACK 6 ACK 9 ACK 6 receiver error

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