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Chapter 7: Parallel I/O Ports

Chapter 7: Parallel I/O Ports. The 68HC11 Microcontroller. Han-Way Huang. Minnesota State University, Mankato. Basic I/O Concepts. Peripheral devices Pieces of equipment that exchange data with a computer. Examples include

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Chapter 7: Parallel I/O Ports

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  1. Chapter 7: Parallel I/O Ports The 68HC11 Microcontroller Han-Way Huang Minnesota State University, Mankato

  2. Basic I/O Concepts Peripheral devices Pieces of equipment that exchange data with a computer. Examples include switches, light-emitting diodes, cathode-ray tube screens, printers, modems, keyboards, and disk drives. Interface (peripheral) chip - A chip whose function is to synchronize data transfer between the CPU and I/O devices. - An interface may consist of control registers, status registers, data direction latches, and control circuitry. - An interface chip has pins that are connected to the CPU and I/O port pins that are connected to the I/O devices. - Each interface chip has a chip enable signal input or inputs, when asserted, allow the interface chip to react to the data transfer request. - Data transfer between an I/O device and the CPU can be proceeded bit-by-bit or in multiple bits.

  3. I/O Schemes 1. Isolated I/O scheme - The microprocessor has dedicated instructions for I/O operations - The microprocessor has a separate address space for I/O devices 2. Memory-mapped I/O scheme - The microprocessor uses the same instruction set for I/O operations - The I/O devices and memory components are resident in the same memory space

  4. I/O Transfer Synchronization The role of an interface chip 1. Synchronizing data transfer between CPU and interface chip. 2. Synchronizing data transfer between interface chip and I/O device.

  5. Synchronizing the Microprocessor and the Interface Chip The polling method 1. for input -- the microprocessor checks a status bit of the interface chip to find out if the interface chip has received new data from the input device. 2. for output -- the microprocessor checks a status bit of the interface chip to find out if it can send new data to the interface chip. The interrupt-driven method 1. for input -- the interface chip interrupts the microprocessor whenever it has received new data from the input device. 2. for output -- the interface chip interrupts the microprocessor whenever it can accept new data from the microprocessor.

  6. Synchronizing the Interface Chip and the I/O Devices Brute-force method -- useful when the data timing is unimportant 1. for input -- nothing special is done. The microprocessor reads the interface chip and the interface chip returns the voltage levels on the input port pins to the microprocessor. 2. for output -- nothing special is done. The interface chip places the data that it received from the microprocessor directly on the output port pins. The strobe method -- a strobe signal is used to indicate that data are stable on I/O port pins 1. for input -- the interface chip latches the data into its data register using the strobe signal. 2. for output -- the interface chip places the data on port pins that it received from the microprocessor and asserts the strobe signal. The output device latches the data using the strobe signal. The handshake method -- used when timing is crucial - two handshake signals are used to synchronize the data transfer. One signal, call it H1, is asserted by the interface chip. The other signal, call it H2, is asserted by the I/O device. - two handshake modes are available -- pulse mode and interlocked mode.

  7. Input Handshake Protocol Step 1. The interface chip asserts (or pulses) H1 to indicate its intention to input data. Step 2. The input device puts data on the data port pins and also asserts (or pulses) the handshake signal H2. Step 3. The interface chip latches the data and de-asserts H1. After some delay, the input device also de-asserts H2.

  8. Output Handshake Protocol Step 1. The interface chip places data on the port pins and asserts (or pulses) H1 to indicate that it has valid data to be output. Step 2. The output device latches the data and asserts (or pulses) H2 to acknowledge the receipt of data. Step 3. The interface chip de-asserts H1 following the assertion of H2. The output device then de-asserts H2.

  9. 68HC11 Parallel I/O Overview - The 68HC11A8 has 40 I/O pins that are arranged in five I/O ports. - All I/O pins serve multiple functions. - Ports A, B, and E with the exception of port A pin 7 are fixed-direction inputs or outputs. - Ports C and D are bi-directional I/O pins under the control of their associated data direction registers. - Port C, port B, the STRA pin, and the STRB pin are used for strobed and handshake parallel I/O, as well as for general-purpose I/O. Port Registers - To input, the 68HC11 reads from the port data register - To output, the 68HC11 writes into the port data register - All except port C have one data register: PORTA (at $1000) PORTB (at $1004) PORTC (at $1003) PORTCL (at $1005) PORTD (at $1008) PORTE (at $100A)

  10. Fixed Direction I/O (ports A, B, and E) To input from an input port, execute a load instruction with the port data register as the source operand. For example, the following instruction sequence reads a byte from port E: REGBAS equ $1000 ; I/O register block base address PORTE equ $0A ; offset of port E data register from REGBAS ldx #REGBAS ldaa PORTE,X To output a byte to an output port, write to the port data register directly. For example, the following instruction sequence outputs the value #$38 to port B: REGBAS equ $1000 ; I/O register block base address PORTB equ $04 ; offset of port B data register from REGBAS ldx #REGBAS ldaa #$38 staa PORTB,X

  11. Bi-directional I/O (Ports C and D) - Each pin of ports C and D has an associated bit in a specific data register and another in a data direction register. - The primary direction of a pin is set by its associated bit in the data direction register. - When an output pin is read, the value at the input to the pin driver is returned. - The data direction registers are cleared by reset to configure all bi-directional I/O pins for input. - Before performing I/O operation to these two ports, the software should set up the data direction registers of these two ports.

  12. Example 7.1 Write an instruction sequence to output the value $CD to port D. Solution: REGBAS equ $1000 PORTD equ $08 DDRD equ $09 ldx #REGBAS ldaa #$3F ; set up the directions of port D pins staa DDRD,X ; “ ldaa #$CD ; output $CD to port D staa PORTD,X ; “ In C language, DDRD = 0x3F; /* configure port D for output */ PORTD = 0xCD; /* output data to port D */

  13. Parallel I/O Control Register (PIOC) - All strobed mode I/O and handshake I/O are controlled by this register

  14. Strobe Input Port C - Strobe mode I/O is selected when the bit 4 of the PIOC register is set to 0 and port C becomes a strobe input port. - The bit 1 of the PIOC register selects the active edge of the STRA pin. - The active edge of the STRA signal latches the values of the port C pins into the PORTCL register. - Reading the PORTC register returns the current values on the port C pins. - Reading the PORTCL register returns the contents of the latched PORTCL. - When enabled, the active edge of the STRA signal will generate an interrupt to the 68HC11.

  15. Strobed Output Port B The strobe signal STRB is pulsed for two E clock cycles each time there is a write to port B.

  16. Port C Input Handshake Protocol - STRA is a latch command asserted by an input device (active edge is rising in the figure). - STRB is a ready output driven by the 68HC11 (active high in the figure). - When ready for accepting new data, the 68HC11 asserts (or pulses) STRB pin. - The input device places data on input port pins and asserts the STRA signal. The active edge of STRA latches data into the PORTCL register, sets the STAF flag in PIOC register and de-asserts the STRB signal. The de-assertion of STRB inhibits external device from strobing new data into port C. - Not until the 68HC11 reads PORTCL, new data cannot be applied on port C pins.

  17. Port C Output Handshake Protocol - STRA is an acknowledge input (driven by the external device) - STRB is a ready output (driven by the 68HC11) - In this figure, the active edge of STRA is rising and the active level of STRB is high. - The 68HC11 writes data into PORTCL and then asserts STRB to indicates there are valid data on port C pins - The external device then asserts STRA to acknowledge the receipt of data which will then cause STRB to be de-asserted and the STAF flag to be set. - After the de-assertion of STRB, STRA is also de-asserted.

  18. Simple Input Devices: switches, analog-to-digital converter, keyboards, etc. Example 6.2 Connect an 8-DIP switch to port E of the 68HC11 and read a byte from it. Solution: REGBAS equ $1000 PORTE equ $0A LDX #REGBAS LDAA PORTE,X . . . In C #include <stdio.h> main () { char xx; … xx = PORTE; … }

  19. Interfacing Parallel Ports to the Keyboard - A keyboard is arranged as an array of switches, which can be mechanical, membrane, capacitive, or Hall-effect in construction. - In mechanical switches, two metal contacts are brought together to complete a circuit. - Mechanical switches have a problem called contact bounce. A series of pulses are generated because the switch contacts do not come to rest immediately. - The response time of the switch is several orders of magnitude slower than that of a computer. - A debouncing process is needed to solve the contact bounce problem. Keyboard input procedure Step 1. Keyboard scanning to find out which key has been pressed. Step 2. Key debouncing to make sure a key was pressed. Step 3. Table lookup to find the ASCII code of the key that has been pressed.

  20. Keyboard Scanning Techniques • - A keyboard with more than a few keys is often arranged as a matrix of switches that • uses two decoding and selecting devices to determine which key was pressed. • An example of 64-key keyboard is shown in Figure 7.13. • - The MC14051 is an analog multiplexor and is used to select the row. • - The 74LS138 selects the column. • - PC5-PC3 select the row and PC2-PC0 select the column to be scanned. • - X7-X0 are pulled up to 5 V by the pull-up resistors. • - The decoder 74LS138 outputs are asserted low. • - A pressed key will send a low to the X output to the port C pin 7 and hence can be detected.

  21. Keyboard Scanning Algorithm • The basic algorithm is shown • in Figure 7.14. • Since we use port C pin 0 to 2 • to select the column and pin • 3 to 5 to select the row, we • can use the INC PORTC,X • instruction to move to the • next key. This is done in the • program on next page.

  22. The program to scan the keyboard in Figure 7.13 Pins PC7 should be configured for input while PC5-PC0 should be configured for output. REGBAS equ $1000 ; base address of I/O register block DDRC equ $07 ; offset of port C data direction register from REGBAS KEYBD equ $03 ; port C is used as keyboard ldaa #$3F ; set up port C pin directions staa DDRC,X ; “ resetc clr KEYBD,X ; start from row 0 and column 0 scan brclr KEYBD,X $80 debnce ; detect a pressed key brset KEYBD,X $3F resetc ; need to reset the row and column count inc KEYBD,X ; check the next row or column bra scan end

  23. Keyboard Debouncing • The signal output from the key switch falls • and rises a few times within a period of • 5 ms as the contact bounces. • A human being cannot press and release a • key in less than 20 ms, a debouncer will • recognize that the switch is closed/open • after the voltage is low/high for 10 ms. • - Both hardware and software debouncing • techniques are available. • Hardware debouncing techniques • 1. Set-reset flip-flops • 2. Non-inverting CMOS gates • with high-input impedance • 3. Integrating debouncers

  24. Software Debouncing Techniques The easiest software debouncing technique is the wait-and-see technique. After detecting a key switch has been pressed, this technique simply wait for 10 ms and recheck the same key. REGBAS equ $1000 ; base address of the I/O register block KEYBD equ $03 ; offset of PORTC from REGBAS TEN_MS equ 2000 ; loop count for creating 10 ms delay debnce ldy #REGBAS ldx #TEN_MS wait10ms nop ; wait for 10 ms nop ; “ dex ; “ bne wait10ms ; “ ldaa KEYBD,X ; recheck the pressed key bmi scan ; rescan the keyboard if the key is not pressed jmp getcode ; the key switch is indeed pressed end

  25. ASCII Code Table Lookup After the key has been debounced, the keyboard should look up the ASCII table and send the corresponding ASCII code to the CPU. keytab FCC “0123456789” FCC ... . . . FCC … getcode LDX #REGBAS LDAB KEYBD,X CLRA ANDB #$3f ; compute the address of the ASCII code of the pressed ADDD #keytab ; key and leave it in X XGDX ; “ LDAA 0,X ; get the ASCII code END

  26. Example 7.3 Write a C routine to read a character from the keyboard. This routine will perform keyboard scanning, debouncing, and ASCII code lookup and return the ASCII code to the caller. Solution: char get_ascii (); void delay10ms (); char tab[64] = {….}; /* ASCII code table */ char read_kb () { char scanned, pressed; scanned = 0; PORTC = 0; while (1) { while (!scanned) { if (PORTC & 0X80) {/* If key is not pressed */ if ((PORTC & 0x3F) == 0x3F) /* read row 7 and column 7 */ PORTC = 0x00; /* reset to row 0 column 0 */ else PORTC ++; /* scan the next key */ }

  27. else scanned = 1; /* detect a pressed key */ } delay10ms (); /* wait for 10 ms to recheck the same key */ if (!(PORTC &0x80)) return (get_ascii ()); /* the key is really pressed */ else { scanned = 0; } } } /* the following subroutine use OC2 function to create a 10 ms delay */ void delay10ms () { TFLG1 = 0x40; /* clear OC2F */ TOC2 = TCNT + 20000; /* start an OC2 operation to create 10 ms delay */ while (!(TFLG1 & 0x40)); /* wait until 10 ms is over */ } char get_ascii () { char i; i = PORTC & 0x3F; /* obtain the row and column number for table lookup */ return tab[i]; }

  28. Interfacing 68HC11 with a Keypad - People are using 12- to 24-key keypad for many applications. - An example of 16-key membrane keypad is shown in Figure 7.16. The row selection is shown in Table 7.4.

  29. Example 7.4 Write a C program to read a character from the keypad shown in Figure 7.16. This program will perform keypad scanning, debouncing, and ASCII code lookup. Solution: void wait_10ms ( ); char get_key ( ) { DDRC = 0xF0; /* configure PC7-PC4 for output and PC3-PC0 for input */ while (1){ PORTC = 0xE0; /* prepare to scan the row controlled by PC4 */ if (!(PORTC & 0x01)) { wait_10ms ( ): if (!(PORTC & 0x01)) return 0x30; /* return ASCII code of 0 */ } if (!(PORTC & 0X02)) { wait_10ms ( ): if (!(PORTC & 0x02)) return 0x31; /* return ASCII code of 1 */ }

  30. if (!(PORTC & 0X04)) { wait_10ms ( ): if (!(PORTC & 0x04)) return 0x32; /* return ASCII code of 2 */ } if (!(PORTC & 0X08)) { wait_10ms ( ): if (!(PORTC & 0x08)) return 0x33; /* return ASCII code of 3 */ } PORTC = 0xD0; /* set PC5 to low to scan second row */ if (!(PORTC & 0X01)) { wait_10ms ( ): if (!(PORTC & 0x01)) return 0x34; /* return ASCII code of 4 */ } if (!(PORTC & 0X02)) { wait_10ms ( ): if (!(PORTC & 0x02)) return 0x35; /* return ASCII code of 5 */ }

  31. if (!(PORTC & 0X04)) { wait_10ms ( ): if (!(PORTC & 0x04)) return 0x36; /* return ASCII code of 6 */ } if (!(PORTC & 0X08)) { wait_10ms ( ): if (!(PORTC & 0x08)) return 0x37; /* return ASCII code of 7 */ } PORTC = 0xB0; /* set PC6 to low to scan the third row */ if (!(PORTC & 0X01)) { wait_10ms ( ): if (!(PORTC & 0x01)) return 0x38; /* return ASCII code of 8 */ } if (!(PORTC & 0X02)) { wait_10ms ( ): if (!(PORTC & 0x02)) return 0x39; /* return ASCII code of 8 */ }

  32. if (!(PORTC & 0X04)) { wait_10ms ( ): if (!(PORTC & 0x04)) return 0x41; /* return ASCII code of A */ } if (!(PORTC & 0X08)) { wait_10ms ( ): if (!(PORTC & 0x08)) return 0x42; /* return ASCII code of B */ } PORTC = 0x70; /* set PC7 to low to scan the fourth row */ if (!(PORTC & 0X01)) { wait_10ms ( ): if (!(PORTC & 0x01)) return 0x43; /* return ASCII code of C */ } if (!(PORTC & 0X02)) { wait_10ms ( ): if (!(PORTC & 0x02)) return 0x44; /* return ASCII code of D */ }

  33. if (!(PORTC & 0X04)) { wait_10ms ( ): if (!(PORTC & 0x04)) return 0x45; /* return ASCII code of E */ } if (!(PORTC & 0X08)) { wait_10ms ( ): if (!(PORTC & 0x08)) return 0x46; /* return ASCII code of F */ } } }

  34. Simple Output Devices A Single Light-Emitting Diode (LED) - An LED will illuminate when it is forward biased and has enough current flowing through it. - The current required to light an LED brightly ranges from a few mA to more than ten mA. - The voltage drop across a forward-biased LED ranges from 1.7V to more than 2 V. - The voltage drop across the LED with 10 mA current flowing through it is assumed to be 1.7V in this chapter. - In Figure 7.17, the 74HC04 has an high output 4.9V and a low output 0.1V. A high applied to the input of 74HC04 will light the LED. - The 68HC11 does not have the current capability to drive the LED. A chip like the 74HC04 is needed to provide the required current capability.

  35. Example 7.5 Use the 68HC11 port B pins PB3, PB2, PB1, and PB0 to drive blue, green, red, and yellow LEDs. Light the blue LED for 2 s, then the green LED for 4 s, then the red LED for 8 s, and finally the yellow LED for 16 seconds. Repeat this operation forever. Solution: The circuit is shown in Figure 7.18. - To light the blue LED, output $08 to port B. - To light the green LED, output $04 to port B. - To light the red LED, output $02 to port B. - To light the yellow LED, output $01 to port B. - The required time can be created by repeating the following delay loop for 20, 40, 80, and 160 times: ldx #20000 tenth_s nop nop dex bne tenth_s

  36. regbas equ $1000 portb equ $04 org $00 lt_tab fcb 20,$08,40,$04,80,$02,160,$01 org $C000 loop ldy #lt_tab next ldab 0,Y ; get the repetition count ldaa 1,Y ; get the light pattern iny iny ldx #regbas staa portb,X pt_lp ldx #20000 tenth_s nop nop dex bne tenth_s decb bne pt_lp cpy #lt_tab+8 ; reach the table end? bne next bra loop end The Program:

  37. The Seven-Segment Display - A seven-segment display consists of seven LED segments (a, b, c, d, e, f, and g). - A seven-segment display can be found in common-cathode or common-anode type.

  38. Driving the seven-segment displays with the 68HC11 parallel ports - A segment requires 10 mA to be lighted brightly. - A buffer chip like 74ALS244 can be used to boost the 68HC11’s current capability. - The 74ALS244 has a 3V output when it is high and a 0.2V output when it is low. - For the circuit shown in Figure 7.20, a segment will have a current of 13 mA when it is lighted. - To display a BCD digit, an appropriate value must be written to the port register. The value is listed in Table 7.6. - When multiple digits are to be displayed, the multiplexing technique is often used to reduce the number of port pins required.

  39. Using Multiplexing Method to Display Multiple BCD Digits - The 2N2222 can sink 100-300 mA of current and can handle the maximum current (91 mA) flowing into the collector from the common cathode. - To light seven-segment display #5, send out the segment pattern to port B and output the value $20 to port D. - To light display #4, send out the segment pattern to port B and output the value $10 to port D. - etc.

  40. How the Multiplexing Method Works - To light the display #5,…,#0, the corresponding value to be written into port D are $20, $10, $08, $04, $02, and $01 respectively. For example, the following instruction sequence will display the digit 6 on the display #3: REGBAS equ $1000 ; base address of I/O register block PORTB equ $04 ; offset of PORTB from REGBAS PORTD equ $08 ; offset of PORTD from REGBAS DDRD equ $09 ; offset of DDRD from REGBAS six equ $7D ; segment pattern of 6 third equ $08 ; value to allow display #3 to light output equ $3F org $C000 ldx #REGBAS ldaa #output ; configure port D for output staa ddrd,X ; “ ldaa #six ; send the segment pattern of 6 to port B staa PORTB,X ; “ ldaa #third ; select display #3 to be lighted staa PORTD,X ; “ end

  41. In C language, DDRD = 0x3F; PORTB = 0x5F; PORTD = 0x08; Principle of Multiplexing multiple displays: Persistence of vision. As long as one and only one display is lighted and then turned off for a short period of time within one second all digits will appear to be lighted simultaneously.

  42. Example 7.6 Display 123456 on the six seven-segment displays shown in Figure 7.21. Solution: The first step is to build a table of segment patterns (to port B) and display selection values (to port D). This Table can be set up by the following assembler directives: org $00 display FCB $06,$20 FCB $5B,$10 FCB $4F,$08 FCB $66,$04 FCB $6D,$02 FCB $7D,$01

  43. Algorithm for Displaying Multiple Digits Using Time Multiplexing Technique

  44. regbas equ $1000 PORTB equ $04 PORTD equ $08 DDRD equ $09 output equ $3F org $00 display fcb $06,$20 fcb $5B,$10 fcb $4F,$08 fcb $66,$04 fcb $6D,$02 fcb $7D,$01 org $C000 ldx #regbas ldaa #output staa ddrd,X forever ldy #display next ldaa 0,Y ldx #regbas staa PORTB,X ldaa 1,Y staa PORTD,X iny iny ldx #200 ; loop to delay for 1 ms again nop ; “ nop ; “ dex ; “ bne again ; “ cpy #display+12 ; end of table? beq forever bra next ; light the next display end

  45. C language version #include <hc11.h> char display [6][2] = {{0x30, 0x20}, {0x6D, 0x10}, {0x79, 0x08}, {0x33, 0x04}, {0x5B, 0x02}, {0x5F, 0x01}}; void delay_1ms ( ); main ( ) { int i; while (1) { for (i = 0; i < 6; i++) { PORTB = display[i][0]; PORTD = display[i][1]; delay_1ms ( ); } } void delay_1ms ( ) { TFLG1 = 0x40; /* clear OC2F flag */ TOC2 = TCNT + 2000; while (!(TFLG1 & 0x40)); }

  46. Liquid Crystal Displays (LCD) - An LCD must be activated in order to be lighted. - The LCD type of display that is most common today allows light to pass through it when it is activated. - The LCD displays are organized as segments for displaying digits or characters. - Activation of a segment requires a low-frequency bipolar excitation voltage of 30-1000 Hz. - When a voltage is placed across the segment, an electric field is set up which aligns the crystals in the liquid. This alignment allows the light to pass through. - A segment which is not aligned will reflect the light. - The LCD has very high contrast and can be seen extremely well in very bright light. - The main problem of LCD is that it requires light source in dim or dark area because it produces no light of its own.

  47. Optrex DMC-20434 LCD Kit - 4  20 LCD kit that uses Hitachi HD44780 as its display controller. - Can be used with all demo boards manufactured by Axiom Manufacturing. - DB7-DB0 are used to exchange data with the microcontroller. - E pin is the enable signal to the LCD. - RS selects the signal to be accessed. - In CMD-11A8, the address $B5F0 is assigned to the control register and the address $B5F1 is assigned to data register.

  48. The Setup of the DMC-20434 LCD kit - All LCD kits need to be set up before they can be used. - To set up the LCD kit, we need to write appropriate commands into the command register. - Commands for the LCD kit are listed in table 7.8.

  49. Program to initialize the DMC-20434 LCD kit lcd_cmd EQU $B5F0 lcd_init PSHX LDX #lcd_cmd BRSET 0,X $80 * LDAA #$3C STAA 0,X ; set 4  20 display BRSET 0,X $80 * ; wait until LCD is ready LDAA #$01 STAA 0,X ; clear display and move cursor to home BRSET 0,X $80 * LDAA #$0F STAA 0,X ; turn on display BRSET 0,X $80 * LDAA #$06 STAA 0,X ; set cursor increment, shift off BRSET 0,X $80 * LDAA #$14 STAA 0,X ; set cursor shift right BRSET 0,X $80 *

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