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CS 300 – Lecture 3. Intro to Computer Architecture / Assembly Language Digital Design II. Free Food!. Today: Presidents BBQ 1 week: Math dept (Keck's place) 2 weeks: CIS dept (My place) I encourage all of you to come!. Homework 2. It's in the wiki. Homework 1.
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CS 300 – Lecture 3 Intro to Computer Architecture / Assembly Language Digital Design II
Free Food! Today: Presidents BBQ 1 week: Math dept (Keck's place) 2 weeks: CIS dept (My place) I encourage all of you to come!
Homework 2 It's in the wiki
Homework 1 Due tomorrow. Morning. I need details! One line answers probably won't cut it. A little analysis is important.
Essential Skills * Rewriting of boolean equations using Boolean Algebra * Creating SOP equations * Conversion between truth tables, equations, and circuits
Circuit Minimization One of the big ideas in circuit design is the use of boolean algebra to rewrite equations to ones that use fewer gates or have less delay. The main minimization equation is AB + AB' = A(B+B') = A Let's construct a truth table for a "Full Adder" and then minimize the "Carry". We won't learn how to minimize in a systematic way – computers can do this better than you!
Universality Turing described a "universal machine" – a computer that is as simple as possible and yet can do anything that more complex computers can. In digital logic, there is a similar idea: a universal gate. This can be used to construct ANY machine – no other gates are needed.
A Universal Logic Gate Nand: X Y Output ( 1 = True, 0 = False) 0 0 1 0 1 1 • 0 1 1 1 0 How do we make And, Or, and Not from this?
SOP and Hardware Using NAND is particularly useful when a circuit is in SOP form. What does SOP look like using only NAND gates? We'll stick with AND/OR but the actual circuits are generally with NAND only. A PLA is a device that implements large SOP circuits in a very compact manner A ROM is a direct encoding of a truth table
Binary Numbers Everyone here should already know their Base-2 numbers. If you can't do 4 bit numbers fast you're not a true CS major! 0010 4 1010 15 1110 6 0111 11 1100 1
Bigger Structures (Design Patterns) There are a number of common structures that occur in combinatory circuits. Multiplexer: (MUX) Select from a number of different inputs: lots of inputs, a control, and an output that matches one input Demultiplexer (DeMux): This is the opposite of a MUX – send a single input to a bunch of different places depending on a control. Send "0" when the output is not selected.
A 4-1 MUX MUX A B C Output D Select
A Shifter Let's design a 1 bit shifter using a MUX. When the control is 0, we get the data unaltered. When control is 1, we get left shifted data. We'll design this with a 16 bit input – our "word" size. How do you convert a 1 bit MUX to a 16 bit MUX? Does this go slower than the 1 bit MUX?
Algorithm Design Hardware algorithms are similar to software ones but we judge them differently: * Number of gates * Overall delay There are algorithms for all sorts of numeric operations.
Divide and Conquer D&C is a classic schema for algorithm design. Why? Let's look at the design of an important and common circuit: a barrel shifter. Input: 16 bits Shifter Shift CountHow many bits? Shifted Output (16 bits)