Computer Organization and Architecture + Networks

1. Computer Organization and Architecture + Networks Lecture 4 Instruction Sets: Characteristics and Functions Addressing Modes and Formats

2. KEY POINTS • The essential elements of a computer instruction are the opcode, which specifies the operation to be performed; the source and destination operand references, which specify the input and output locations for the operation; and a next instruction reference, which is usually implicit. • Opcodes specify operations in one of the following general categories: arithmetic and logic operations; movement of data between two registers, register and memory, or two memory locations; I/O; and control. • Operand references specify a register or memory location of operand data. The type of data may be addresses, numbers, characters, or logical data. • A common architectural feature in processors is the use of a stack, which may or may not be visible to the programmer. Stacks are used to manage procedure calls

3. KEY POINTS and returns and may be provided as an alternative form of addressing memory. The basic stack operations are PUSH, POP, and operations on the top one or two stack locations. Stacks typically are implemented to grow from higher addresses to lower addresses. • Processors may be categorized as big-endian, little-endian, or bi-endian. A multibyte numerical value stored with the most significant byte in the lowest numerical address is stored in big-endian fashion; if it is stored with the most significant byte in the highest numerical address, that is little-endian fashion. A bi-endian processor can handle both styles.

4. KEY POINTS • An operand reference in an instruction either contains the actual value of the operand (immediate) or a reference to the address of the operand. A wide variety of addressing modes is used in various instruction sets. These include direct (operand address is in address field), indirect (address field points to a location that contains the operand address), register, register indirect, and various forms of displacement, in which a register value is added to an address value to produce the operand address • The instruction format defines the layout fields in the instruction. Instruction format design is a complex undertaking, including such considerations as instruction length, fixed or variable length, number of bits assigned to opcode and each operand reference, and how addressing mode is determined.

5. Introduction • CPU: contains Registers, Control Unit, Interconnection and Arithmetic and Logic Unit (ALU) • ALU: comprises Arithmetic (discussed in previous note) + Logic Unit (this note) • Machine Instruction Sets: boundary for computer designer and computer programmer can seen the same machine • To computer designer: machine instruction sets – provides the functional requirements for the processor • To computer programmer: machine instruction sets – becomes aware of the register and memory structure and types of data supported by the machine

6. What is an Instruction Set? • Instruction Set is the complete collection of instructions that are understood by a CPU/processor • Each instruction must contain 4 elements of information for execution • Operation code • Source operand reference • Result reference • Next instruction reference

7. Instruction Set: 4 Elements • Operation code (Opcode) • specifies the operation to be performed (expressed as a binary code)  Do this • Source Operand reference • operands required for the instruction are specified  To this (memory/input-output/processor register) • Result Operand reference • where should the result of the operation to be placed? Put the answer here (memory/input-output/processor register) • Next Instruction Reference • how / where is the next instruction to be found  When you have done that, do this…

8. Simple Instruction Format Each instruction is represented by a sequence of bits. The instruction is divided into fields, corresponding to the constituent elements of the instruction.

9. Instruction Set: Representation & Types • Instruction Representation • Each instruction is represented by a sequence of bits • A symbolic representation is used eg. ADD, SUB, LOAD • Operands can also be represented in this way eg. ADD A,B (Add B to A and Store in A) • Instruction Types (4 Types of Instructions) • Data processing  Arithmetic and Logic Instructions • Data storage (main memory)  Memory Instructions • Data movement (I/O)  I/O Instructions • Program flow control  Test and Branch Instructions

10. Instruction Set: Number of Addresses • Number of Addresses in each instructions • 3 addresses: Operand 1, Operand 2, Result (2 Source Locations) (1 Destination) • a = b + c; • Not common because it needs very long words to hold the address • 2 addresses: One address doubles as operand and result • a = a + b • Reduces length of instruction • 1 address: Implicit (Internal) second address • Usually a register (accumulator); Acc = Acc + a • Common on early machines

11. Instruction Set • 0 (zero) addresses: All addresses implicit (Internal) • Uses a stack (Special Memory Organization; Use the top 2 elements in Processor Registers) • Push: include a new element on top of the stack • Pop: transfer the top element of the stack to destination • Eg. c = a + b (push a; push b; add ; pop c;) Consider: Y = (A-B) / (C+D*E) • 3 addresses  2 addresses SUB Y,A,B YA-B MOV Y,A YA MUL T,D,E TDxE SUB Y,B YY-B ADD T,T,C TT+C MOV T,D TD DIV Y,Y,T YY/T MUL T,E TTxE ADD T,C TT+C DIV Y,T YY/T

12. Instruction Set • 1 address  0 address LOAD D ACD >> Converts to postfix MUL E ACACxE (reverse Polish) notation: ADD C ACAC+C Y = AB-CDE*+/ STORE Y YAC PUSH A LOAD A ACA PUSH B SUB B ACAC-B SUB DIV Y ACAC/Y PUSH C STORE Y YAC PUSH D PUSH E MUL ADD DIV POP Y

13. How Many Addresses • More addresses • More complex instructions • More registers • Inter-register operations are quicker • Fewer instructions per program • Fewer addresses • Less complex instructions • More instructions per program • Faster fetch/execution of instructions

14. Instruction Set Design • The design of Instruction Set in complex • Programmer have control of the processor through Instruction Set • Issue of Instruction Set Design: • Operation repertoire • How many ops? • What can they do? • How complex are they? • Data types • Instruction formats • Length of op code field • Number of addresses

15. Instruction Set Design • Registers • Number of CPU registers available • Which operations can be performed on which registers? • Addressing modes (later…)

16. Types of Operand • Machine Instruction operates on data • Categories of data are: • Addresses • Numbers • Integer/floating point • Decimal numbers – necessity to convert from decimal to binary on input and from binary to decimal on output • Characters • ASCII, IRA(International Reference Alphabet) etc. • Logical Data • Bits or flags (1 – true or 0 – false)

17. Pentium Data Types • General data types with 8 bit Byte, 16 bit word, 32 bit double word, 64 bit quad word • Uses Little-Endian Style: Least Significant Byte is stored in the lowest address • Other numeric data format: Byte unsigned int, Word unsigned int, Double precision floating point

18. Pentium Floating Point Data Types Pentium Numeric Data Format *Signed integers are in twos complement representation

19. Pentium Floating Point Data Types Pentium Numeric Data Format *Signed integers are in twos complement representation *FP: actually refers to a set of types that are used by the FP unit and operated on by FP instructions

20. PowerPC Data Types • General data is same as in Pentium - 8 (byte), 16 (halfword), 32 (word) and 64 (doubleword) length data types • Use both little-endian/big-endian style (Least Significant Byte is stored in the highest address) • Other numeric format: • Unsigned byte (logical or integer arithmetic operations), unsigned halfword (unsigned byte), signed halfword, unsigned word, signed word, unsigned doubleword, byte string (0 to 128 bytes in length)

21. Types of Operation Typical categorization of operations for Instruction sets on all machines: • Data Transfer • Arithmetic • Logical • Conversion • I/O • System Control • Transfer of Control

22. Data Transfer Move, Push, Pop, Load • Specify instruction • Location of the source and destination operands – each location could be memory, register or top of the stack • Length of data to be transferred • Mode of addressing

23. Arithmetic • Basic arithmetic operation  Add, Subtract, Multiply, Divide • Signed Integer (fix-point numbers) • Floating point • May include • Increment (a++) • Decrement (a--) • Negate (-a) • Execution of arithmetic instruction may involve data transfer operations (refer program execution – Lecture 3)

24. Logical • Boolean Operations • 2 types operations • Bitwise operations – basic logical operations • Shifting and Rotating Function – bits of a word are shifted left or right

25. Logical • Shifting and Rotating Function

26. Logical • Shifting and Rotating Function • Logical shifts are useful for isolating fields within a word – 0s are shifted into a word to displace unwanted information that is shifted off the other end

27. Logical • Logical shifts: useful for isolating fields within a word Eg. To send 2 characters to an I/O device 1 character at a time. If each memory word is 16 bits in length and contains 2 characters, this means that, 1 character is 8 bits. To send the 2 characters in a word, for the 1st character: • Load the word into a register and AND with 1111111100000000 (character on the right is masked out) • Shift to the right 8 times and shifts the remaining character to the right half of the register. Perform I/O. The I/O module reads the lower-order bits from the data bus.

28. Logical For the 2nd character: • Load the word into a register and AND with 0000000011111111 (character on the left is masked out) • Perform I/O.

29. Logical • Shifting and Rotating Function • Arithmetic shifts: The sign bit is replicated into the bit position to its right Logical left shift is performed on all bits but the sign bit is retained

30. Logical • Arithmetic shifts: • Treats the data as signed integer and does not shift the sign bit • This operation can speed up certain arithmetic operations • Because of potential for overflow (overflow produces a different results), only certain processor has this instruction eg. IBM S/390

31. Logical • Shifting and Rotating Function • Rotate/Cyclic shifts:

32. Logical • Rotate/Cyclic shifts: • Preserve all the bits being operated on • One application of rotate/cyclic shift: to bring each bit successively into the leftmost bit (this can be identified by testing the sign of the data

33. Conversion • Change the format or Operate on the format of data • E.g. Converting from Decimal to Binary and also conversion from one 8-bit code to another

34. Input/Output • May be specific instructions • May be done using data movement instructions (memory mapped) • May be done by a separate controller (DMA)

35. Systems Control • These instructions are for the use of operating system and are executed only while the processor is in certain privileged state. • Eg. Instruction is used to read/modify a storage protection key

36. Transfer of Control • In normal program, the instruction are implemented in sequence that is 1 instruction after another. But, sometimes, transfer of control is necessary because: • to allow repetition of instruction (more than 1 time); loop can be used • to allow decision making to be implemented • to allow a big tasks to be separated into smaller tasks • Most common transfer of control found in instruction sets are (i) branch (ii) skip (iii) procedure call

37. Transfer of Control (i) Branch Instructions • 2 types of branch: • Conditional Branch: branch is taken only if certain condition is met eg. Branch to x if result is zero • Unconditional Branch: branch is always taken

38. Branch Instruction Branch from location 203 to 211 when X - Y = 0 Branch from location 225 to 235 when R1 = R2 Instructions in locations 202 through 210 will be executed repeatedly until the X-Y=0

39. Transfer of Control (ii) Skip Instructions • This instruction includes an implied (indirect) address and does not require a destination address field. • One instruction is to be skipped • Implied address = address of the next instruction + 1 instruction length • Eg. Increment and skip if zero (ISZ) 301 • • 309 ISZ R1 310 Branch xxxx 311

40. Transfer of Control (ii) Skip Instructions 301 • • 309 ISZ R1 310 Branch xxxx 311 Register 1, R1, is set to a negative number equivalent to the number of iterations to be peformed. At the end of the loop, R1 is incremented and if is not = 0, program branch back to 301. Else (R1 = 0), program skips the branch and continues with the next instruction

41. Transfer of Control (iii) Procedure Call Instructions • Procedure: a self-working computer program that can be inserted into a larger program and can be called at any point

42. Nested Procedure Calls Main Program starts at location 4000, which include a call to procedure PROC1 CPU suspends execution and begins execution of PROC1 by fetching the next instruction from location 4500 Within PROC1, there are two calls  PROC1 is suspended and PROC2 is executed RETURN statement causes the CPU to go back to the calling program and continue execution

43. Instruction Sets: Addressing Modes So far: • Focused on WHAT an instruction set does •  types of operands and operations, that may be specified by machine instructions Now • Focused on HOW to specify the operands and operations of instructions •  How is the address of an operand specified  Addressing Modes • How are the bits of an instruction is organized to define the operand address and operation of that instruction  Instruction Formats

44. Addressing Modes • The requirement: to reference a large range of locations in main memory  Addressing Techniques • 7 addressing modes/techniques: ①Immediate/②Direct/③Indirect/④Register/⑤Register Indirect/⑥Displacement/⑦Stack • All computer architectures  provides 1 or more than 1 of these addressing modes

45. Addressing Modes - Issues • How the processor know which addressing mode is being used a.Looking at the opcodes(different opcodes for different addressing mode) b.Looking at the mode field (mode field  1 or more bits in the Instruction Format • Effective Address (EA) Interpretation:  System Without Virtual Memory: EA = Main Memory + Register  System With Virtual Memory: EA = Virtual Address / Register * Effective Address = actual address of the location containing the reference operand

46. ①Immediate Addressing • Operand is part of the instruction • Operand = address field • e.g. ADD 5 • Add 5 to contents of accumulator • 5 is operand • Used to define constants/set initial values of variables • No additional memory references are required after the fetch of the instruction • Size of the operand (mean its range of values)  limited range • Fast

47. ① Immediate Addressing Diagram Instruction Opcode Operand Twos complement form: the leftmost bit of the operand field as a sign bit

48. ②Direct Addressing • Address field of the instruction contains the affective address of the operand • Effective address, EA = address field, A • e.g. ADD A • Add contents of cell A to accumulator • Look in memory at address A for operand • Single memory reference (memory access) is required to fetch the operand • No additional calculations to work out effective address • Address range is limited by the address space (width of the field that contains the address reference)

49. ②Direct Addressing Diagram Instruction Opcode Address A Memory A: Contents of an address field in the instruction Operand

50. ③Indirect Addressing • Memory cell pointed to by address field contains the address of (pointer to) the operand – specifies a memory location which contains the address of the data • EA = (A) *( ) = contents of A • Look in A, find address (A) and look there for operand • e.g. ADD (A) • Add contents of cell pointed to by contents of A to accumulator • 2 memory accesses are required • Fetch effective address (EA) : 1st Access • Fetch the operand : 2nd Access