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Chapter 3

Chapter 3. Data Storage. Learning outcomes. By the end of this Chapter you will know: The difference between electronic, magnetic and optical memory How data are stored in these types memories The main memory is made up of logic gates

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Chapter 3

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  1. Chapter 3 Data Storage CIS110

  2. Learning outcomes • By the end of this Chapter you will know: • The difference between electronic, magnetic and optical memory • How data are stored in these types memories • The main memory is made up of logic gates • The main memory is organised in terms of cells and addresses • memory terms: • Memory capacity, access time, transfer rate, etc … • How the address decoder works CIS110

  3. Additional Reading • Essential Reading • Stalling (2003): Chapters 5 and 6 • Further Reading • Burrell (2004): Chapters 3 and 7 • Schneider and Gersting (2004): Chapters 4 and 5 • Tanenbaum (1990): Chapter 3 • White (2002): Parts 3 and 4. CIS110

  4. Introduction (1) • Information can be stored in different ways: • Books, • Films • Paintings, • It is not information if it could not used • Information in computers must be able to able to be processed by computers: • Information must be represented in appropriate format • Information must be stored in appropriate places CIS110

  5. Introduction (2) • Breakthrough: • The use of the binary system (Base 2) • In the binary system: • There is only two types of values, 1s and 0s. • It is easy to store binary information/data in physical media • It is also easy to process binary information • Different type of media storage • Electronic memory (main memory) • Magnetic memory • optical memory CIS110

  6. Media Storage • Main memory (Electronic Memory): • Stores data currently being used • Is made of semiconductor chips. • Secondary Memory • magnetic (floppy discs, hard disc ) • Optical (CD-ROM, DVD) CIS110

  7. Main Memory (Electronic Memory) • Main memory stores data which are currently used by the CPU. • To run a program, it is first loaded in the main memory • Main Memory is volatile • Its content changes frequently • Data is lost when the power is off • It is also called electronic memory • Based on electronic principles. • Formed with logic gates • Group of transistors • Cells • Sequence of one-bit memories • Addresses • Each cell has a unique address CIS110

  8. The physical principles of electronic memory • Transistor • The smallest unit of an electronic memory • Logic Gates • Groups of transistors • Flip-Flops • Special type of circuit CIS110

  9. ¬ a. a b a a b a.b a.b 0 0 0 0 1 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 1 0 1 0 0 1 1 1 Logic Gates (2) OR AND NOT CIS110

  10. a b a b a b a.b a.b a.b 0 0 1 0 1 1 1 0 1 1 1 0 0 0 1 0 1 0 1 0 0 1 1 0 0 0 0 0 1 1 1 0 1 1 1 0 Logic Gates (3) NAND XOR NOR • For more details see • Schneider and Gersting (2004: 155-177) • Burrell (2004: 43-62) CIS110

  11. Flip-Flop circuits • Up to now the output of combinational circuits depends solely up the input • Combinational circuits has no memory • To build a sophisticated digital signal circuits, memory, we need: • We need circuits whose output depends upon both the input of the circuit and its previous states. • In other words, we need circuit that have memory. CIS110

  12. A Simple Flip-flop Circuit • As long as both inputs remain 0: output does not change • Temporarily placing 1 on upper input => output = 1 • Temporarily placing 1 on lower input => output = 0 • So: output flip-flops between 2 values under external control CIS110

  13. Setting the Output of a Flip-flop to 1 CIS110

  14. Setting the Output of a Flip-flop to 1 (cont’d) CIS110

  15. Setting the Output of a Flip-flop to 1 (cont’d) CIS110

  16. Controlled Flip-Flop • If control = 0 the the flip-flop does not change the state • If control = 1, then if D=0 then Q =1 else Q = 0 CIS110

  17. Clocked SR flip-flop • If CP = 0 the output of both AND gates is 0. • Regardless of the values of S and R. • If S=R=CP=1, then both outputs are set to 0 CIS110

  18. Main Memory • Large collection of circuits, each capable of storing a single bit • Arranged in small cells, typically of 8 bits each (a.k.a.: byte) CIS110

  19. Arrangement of Memory Cells • Each cell has a unique address • Longer strings stored by using consecutive cells value = 01101101 • RAM (random access memory) CIS110

  20. Q D CP One-bit Memory • To write a datum (0 or 1) to this memory • send data to D, and at the same time • send a WRITE signal to CP • To read a datum from this memory • connect to Q by sending a READ signal CIS110

  21. Main memory = linking many flip-flops See Burrell (2004: 111-112) and Tanenbaum (1990: 105-109) t CIS110

  22. Memory cells • In reality, most electronic memories have 8-bit cells. n-bit cell Can hold m*n bits m cells CIS110

  23. Accessing Data in the Main Memory • Instructions and data are stored in the main memory in a serial order. • CPU executes instructions one by onetop down. • An instruction may tellthe CPU • to jump to particular cell and execute the instruction held in it, • or fetch the data stored is that cell. • How is this done? CIS110

  24. System Bus • Main memory and CPU are linked using a set of wire: • Three wires: • address lines, • data lines and • control lines. • Known as • address bus, • data bus and • control bus. System bus CIS110

  25. Main memory CPU Add. bus Data bus Control bus CIS110

  26. To read data from each cell To issue read or write signal To identify each memory cell Main memory CPU Add. bus Data bus Control bus CIS110

  27. Address Bus Address Of the cell To activated Address Of the cell To activated Main memory CPU Address bus CIS110

  28. Binary Address Representation • Each cell has a unique address. • I.e. using 4 digit binary representation we have: 0000 cell 0 0001 cell 1 0010 cell 2 0100 cell 3 • How many bits are needed to represent an address? CIS110

  29. Address Decoder Unique cell Has a unique Address. Address Of the cell To activated Main memory CPU Decoder Address bus CIS110

  30. A Simple Address Decoder Q0 00 C0 2 ad-lines A1 Q1 01 C1 22 = 4 address cells A0 Q2 10 C2 Q3 11 C3 Decoder is a device between the Main Memory and the address lines. CIS110

  31. Decoder with N Address Lines Main Memory 0000…0000 a0 a1 0000…0001 0000…0010 2n add cell n add. lines 1111…1111 an-1 CIS110

  32. Main Memory with 4 Chips decoder Main memory a0 a1. . . . . . . aN-1 Chip 1 Chip 2 Chip 3 Chip 4 CIS110

  33. The higher 2 bits of Address line to select The chip. a n-1a n-2 …..………..a0 0 0 0………….. 0 0 0 1………….. 1 0 1 0………….. 0 0 1 1………….. 1 1 0 0………….. 0 1 0 1………….. 1 1 1 0………….. 0 1 1 1………….. 1 Chip 1 Chip 1 Chip 2 Chip 3 Chip 4 CIS110

  34. Multiplexer • Cells form rows and columns. • Each cell can be identified by a row address and column address. • Each cells address uses only n/2 address lines. • This can be done using a multiplixed addresses. CIS110

  35. Decoder with 4 Address Lines (non-multiplexed addresses) CIS110

  36. Decoder with 2 Address Lines (multiplexed addresses) 00 11 01 10 00 01 10 11 CIS110

  37. Two-Input Multiplexer • A multiplexer is an electronic device that allows multiple logical signals to be transmitted simultaneously across a single physical channel (address line). CIS110

  38. Example 1 • Suppose computer’s MainMemory is linked to a decoder with 8 address lines. • Can 1000 memory cells be used? • If no what is the maximum number of addresses that can generated? • What is the maximum number of addresses that can be generated is multiplexed addresses are used? CIS110

  39. Answer • Suppose computer’s MainMemory is linked to a decoder with 8 address lines. • Can 1000 memory cells be used? • If no what is the maximum number of addresses that can generated? • Answer: • NO • With 8 address lines, the maximum number of addresses is 28=256 • 22*8 = 216 CIS110

  40. Example 2 • Suppose that a computer’s MainMemory has 1013 cells. • How many address lines are needed in order for all the cells to be useable? Explain your answer. CIS110

  41. Answer • Suppose that a computer’s MainMemory has 1013 cells. How many address lines are needed in order for all the cells to be useable? Explain your answer. • Answer: • With N address lines a computer can have a maximum 2N usable cells. 29 = 512, 210 = 1024. • 9 address lines would not generate enough addresses for 1013 cells to be used. 10 address lines would. • Having more than 10 address lines would lead to too many addresses wasted. So the desired number of address lines is 10. • N =⌈log2(1050)⌉ can be used to find the number of address lines. • If multiplexed addresses is used, then 5 address lines would be sufficient for 1013 cells to be useable. CIS110

  42. What does a word mean? • A wordis the length of instructions the CPU can execute at one time. • Some processor can handle 8-bitwords others 16-bit, 32-bit, 64-bit. • A cell does not necessarily store one word. • A word can occupy more than one cell. CIS110

  43. Address Space • The address space of a computer is the maximum number of cells a computer can hold. • The address space is determined by the number of address lines used in a computer. • If each cell in a memory is 8-bit, then the memory is called byte addressable: 1 byte long has a unique address CIS110

  44. Features of the Main Memory • Memory Capacity. • Access of information • Access time • Transfer rate CIS110

  45. Memory Capacity • Most computer’s memory have 8-bit (1-byte) cells. • In this case we have: • 32KB, 256MB and 20GB are used to describe the memory capacity. CIS110

  46. Capacity Units CIS110

  47. Access Time • Access time is taken between the moment when the CPU wants the read/write from/into a cell and the moment when the cell is activated. • It is the moment that the CPU takes to activate a cell. • 60ns (10-9 sec) CIS110

  48. Transfer Rate • Is the amount of information per second exchanged between the CPU and main memory. • If the CPU can read n cells in a second and each cell has m bytes then transfer rate is n*m (bytes/s) • Main memory • electronic signals • Implies fast transfer rate in the scale about 100MB/sec CIS110

  49. Random Access • If the CPUwants to activate particular cell. • It does not search for the target cell from top to bottom. • It does put the address of the target cell in the address line, then the cell will be activated. • This type of accessing information is called RandomAccess CIS110

  50. The need for other type of memories. • Main memory • Fast as all the exchange between CPU and Main memory is done electronically. • However, it is volatile. • Information lost when the machine is turned off. • The need for non-volatile memory: • Hold information when the machine is off. • i.e. Magnetic disk, optical disk, magnetic tape CIS110

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