1 / 10

CGS 3763 Operating Systems Concepts Spring 2013

CGS 3763 Operating Systems Concepts Spring 2013. Dan C. Marinescu Office: HEC 304 Office hours: M- Wd 11:30 - 12:30 A M. Last time: Memory hierarchies. Binary image; swapping Contiguous allocation of the main memory Physical, logical, and virtual addresses

kaoru
Download Presentation

CGS 3763 Operating Systems Concepts Spring 2013

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. CGS 3763 Operating Systems Concepts Spring 2013 Dan C. Marinescu Office: HEC 304 Office hours: M-Wd 11:30 - 12:30 AM

  2. Last time: Memory hierarchies. Binary image; swapping Contiguous allocation of the main memory Physical, logical, and virtual addresses Paging Today Paging Implementation of paging Dynamic address translation Next time Virtual memory Reading assignments Chapters 8 and 9 of the textbook Lecture 34 – Monday, April 8, 2013 Lecture 34

  3. Paging • Logical address space of a process can be noncontiguous; process is allocated physical memory whenever the latter is available • Divide physical memory into fixed-sized blocks called frames(size is power of 2, between 512 bytes and 8,192 bytes) • Divide logical memory into blocks of same size called pages • Keep track of all free frames • To run a program of size n pages, need to find n free frames and load program • Set up a page table to translate logical to physical addresses • Internal fragmentation • Each process has its own page table. Lecture 34

  4. Paging logical and physical memory Lecture 34

  5. Paging example 32-byte memory and 4-byte pages Lecture 34

  6. Free frames After allocation Before allocation Lecture 34

  7. Lecture 34

  8. Dynamic Address Translation • Address generated by CPU is divided into: • Page number (p) – used as an index into a pagetable which contains base address of each page in physical memory • Page offset (d) – combined with base address to define the physical memory address that is sent to the memory unit • A logical address consists of (m-n + n) =m bits. Thus the size of the logical address space is 2m . • There are n bits to specify an address in a page thus the page size is2n page number page offset p d m - n n Lecture 34

  9. Lecture 34

  10. Example We assume a byte addressable memory. A virtual address is 32 bits  the maximum size of the virtual address space of a process is 232 = 4 GB. The page size is 4 KB  we need 12 bits to identify an address in a page (212= 4 KB). The number of bits used to identify a page is 32 – 12 = 20. This means that the maximum number of pages thus the maximum size of the page table of a process is 220 = 1,000,000 entries. How do we translate the virtual address: 0000 0000 0000 0000 0101 0000 0000 1110 to a physical/real address assuming that page 5 is in the main memory at address 1000? Lecture 34

More Related