PCI & PCI-E

1. PCI & PCI-E Sephiroth Kwon GRMA 2009-05-26

2. PCI

3. Outline Diagram Signal Description Repair Flow Chart Repair Technique

4. PCI

5. PCI Diagram South Bridge PCI BUS Clock Gen. Clock Signal PCI SLOT

6. PCI Diagram RN Clock Gen. B76 PCLK1 PCLK2 B76 PCLK3 B76 C C C Clock Circuit PCI 1 PCI 2 PCI 3

7. Signal Description PCI Compliant Device AD[63:32] AD[31:0] C/BE[7:4]# Address & Data C/BE[3:0] PAR64 PAR REQ63# FRAME# ACK64# IRDY# LOCK# TRDY# Interface Control INTA# STOP# INTB# DEVSEL# INTC# IDSEL INTD# PERR# SBO# Error Reporting SERR# SDONE REQ# TDI Arbitration GNT# TDO CLK# TCK System RST# TMS TRST#

8. Voltage and Clock 1.Check Voltage： 2.Check Clock： A mean “Left”, B mean “Right”

9. AD Signal

10. Control Signal 1.Check Control Signal： A mean “Left”, B mean “Right”

11. (1)System Pins CLK All other PCI signals, except RST#, INTA#, INTB#, INTC#, and INTD#, are sampled on the rising edge of CLK and all other timing parameters are defined with respect to this edge. RST# Anytime RST# is asserted, all PCI output signals must be driven to their initial state. RST# may be asynchronous to CLK when asserted or deasserted.

12. (2) Address and Data Pins AD[31::00] A bus transaction consists of an address phase followed by one or more data phases. PCI supports both read and write bursts. C/BE[3::0]# During the address phase of a transaction, C/BE[3::0]#define the bus command. During the data phase, C/BE[3::0]#are used as Byte Enables.

13. (3)Interface Control Pins FRAME#(Cycle Frame) Driven by the current master to indicate the beginning and duration of an access. IRDY#(Initiator Ready) Indicates the initiating agent’s (bus master’s) ability to complete the current data phase of the transaction. TRDY#(Target Ready) Indicates the target agent’s (selected device’s) ability to complete the current data phase of the transaction. DEVSEL#(Device Select) Indicates the driving device has decoded its address as the target of the current access. STOP# Indicates the current target is requesting the master to stop the current transaction. IDSEL(Initialization Device Select) Chip select during configuration read and write transactions.

14. (4)Arbitration Pins REQ# Indicates to the arbiter that this agent desires use of the bus. This is a point-to-point signal. Every master has its own REQ#. GNT# Indicates to the agent that access to the bus has been granted. This is a point-to-point signal. Every master has its own GNT#.

15. (5)Interrupt Pins Interrupts on PCI are optional and defined as “level sensitive”, “active low”, using open drain output drivers. INTA# : Interrupt A is used to request an interrupt. INTB~D# : Interrupt B~D are used to request an interrupt and only has mean on a multi-function device.

16. Repair Flow Chart START Visual Inspection check PCI pin is not bent or damaged. OK NG Change any damaged PCI connector OK Measure PCI Voltage NG Check PCI Voltage 12V.-12V.5V.3V.3VSB Fix any trace open or RLC damaged OK OK NG Measure PCI Clock Fix any trace or RLC damaged, change NG CLK Generator Check PCI CLK 33Mhz NG OK OK NG Measure PCI AD signals NG Check AD0~31, compare with good MB Fix any trace open or RLC damaged OK OK NG Measure PCI control signals NG Check RST#,FRAME#, DEVSEL#,IRDY#..... Fix any trace open or RLC damaged OK OK NG Remove NG Device under PCI /Change SB Finished

17. Repair Technique-Visual Inspection Visual Inspection to check the PCI connector is no pin bent or broken. 1

18. Repair Technique-Measure PCI Voltage Use Multi-Meter to measure PCI related voltages (+12V, -12V,5V,3.3V) 2

19. Repair Technique-Measure PCI Clock Use Oscilloscope to measure PCI Clock =33Mhz 3-1 3-2

20. Repair Technique- Measure PCI other signals Use Multi-Meter to measure other PCI signals: AD0~AD31(refer to P16)& control signals ( FRAME#, IRDY#, TRDY#.......(refer to P17) Compare with good MB. If find error trace the connection to find any trace open or short. If cannot find the root cause please try to remove other component under PCI bus and change PCI controller-SB. 4

21. PCI-E

22. Outline Diagram Signal Description Repair Flow Chart Repair Technique

23. PCI-E

24. PCI-E X16 Diagram-1 North Bridge B8,A9,A10 +3V B10 +3VSB B1,B2,B3,A2,A3 +12V PCI-E *16 SLOT

25. PCI-E X16 Diagram-2 R Clock Gen. A13 Clock+ Clock- A14 Clock Circuit PCI-E *16

26. PCI-E X1 Diagram +12V (B1,B2,B3) +12V (A2,A3) +3V (A9,A10) +3VSB (B10) +3V (B8) Clock (A13,A14) North & South Bridge PCIE*1

27. Repair Flow Chart START Visual Inspection check PCI-E pin is not bent or damaged. OK NG Change any damaged in PCI-E connector OK Measure PCI-E Voltage NG Check PCI Voltage 12V.3V.3VSB Fix any trace open or RLC damaged OK OK NG Measure PCI-E Clock Fix any trace or RLC damaged, change NG CLK Generator NG OK Check PCI-E CLK 100Mhz OK NG NG Measure PCI-E TX /RX signals Check TX /RX signals, compare with good MB Fix any trace open or RLC damaged OK NG OK OK Change NB(PCI-EX16) or SB(PCI-EX1) Finished

28. Repair Technique-Visual Inspection Visual Inspection to check PCI-E connector is not damaged or bent pin inside. 1-1 1-2

29. Repair Technique-Measure PCI-E Voltage Use Multi-Meter to measure PCI-E working Voltages—12V, 3V, 3VSB. 2-1 P.S. We can use PCI-E X16 Signals Pin Out card to measure. P/N: 08-900036900 Name: ENG_PCI-E PIN NAME R1.00 2-2

30. Repair Technique- Measure PCI-E Clock Use Oscilloscope to measure PCI-E CLK =100Mhz 3-1 3-2

31. Repair Technique-Measure PCI-E TX/RX signals Use Multi-Meter to measure PCI-E TX/RX signals, compare with good MB. If find error please trace the circuit to check related trace & RLC components. If still can’t find any abnormal please try to change NB (PCI-E X16 controller) or SB (PCI-E X1 controller). 4-1 4-2

32. Thank You!