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Toshiba Video Watermarking Technology HIDE -Human eye Insensitive Digitally Embedded watermark-. Apr. 10, 2003 TOSHIBA Corporation. Features of HIDE. Satisfying the following requirements Robustness against various kinds of operations and attacks
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Toshiba Video Watermarking TechnologyHIDE-Human eye Insensitive Digitally Embedded watermark- Apr. 10, 2003 TOSHIBA Corporation TOSHIBA Corporation
Features of HIDE • Satisfying the following requirements • Robustness against various kinds of operations and attacks • Especially, robust against scaling and filtering • Low false positive error rate • Good transparency • Sufficient capacity for copy control usage • Baseband detection, independent from the compression methods and formats TOSHIBA Corporation
Robustness/Survivability • HIDE technology is robust against various kinds of attacks: • Vertical and/or horizontal scaling • MPEG2/MPEG4 compression and decompression • VHS recording • D/A and A/D conversions • Random noise addition • Gamma correction • Jitter attack • Rotation attack • Stirmark attack TOSHIBA Corporation
Robust against scaling • In principle, HIDE is not affected by scaling of images • Scaling and clipping cannot break the relationship between the original image and the embedded watermark reference image TOSHIBA Corporation
Transparency • Sophisticated adaptive modulation based on characteristics of the original image for decreasing artifact caused by the watermark image • Any annoying artifact can hardly be perceived in the watermarked image TOSHIBA Corporation
Capacity • HIDE can carry 7 bits. • The capacity can be extendedts more than 7 bits. • It can fully support the DVD CCI states. • Supports CCI states for remarking. TOSHIBA Corporation
Baseband detection • The detection and remarking of HIDE technology are performed in the baseband domain. • HIDE technology satisfies the requirements and functional needs for both analog and digital copy control systems. • HIDE technology can handle images independent from compression methods and formats on any media. TOSHIBA Corporation
Hardware implementation W/o off-chip memory With off-chip memory Random 83k gates Instruction ROM 8kB On-chip memory 38kB 12kB Total area (0.18um) 1.96 mm2 1.11 mm2 Total area (0.13um) 0.98 mm2 0.56 mm2 Total area (0.09um) 0.49 mm2 0.28 mm2 * 1bit corresponds to roughly 1-2gates. TOSHIBA Corporation