Router modeling using Ptolemy

1. Router modeling using Ptolemy EE290N Xuanming Dong and Amit Mahajan May 15, 2002

2. Project Goals • Modeling routers in Ptolemy • Proposing and verifying design improvements

3. Approach • Modeled a typical router in Ptolemy • Identified the bottlenecks in routers • Proposed solutions for these problems and verified some desirable properties

4. Router Architecture (I) • Set of input and output interfaces interconnected by a high speed fabric input interface backplane output interface

5. Router Architecture (II) Routing RSVP RSVP messages Routing Messages Control Plane Admission Control Forwarding Table Per Flow QoS Table flow 1 Data In Route Lookup Switch Fabric Classifier Scheduler flow 2 Data Out flow n Data Plane Buffer management

6. Recent Router Research • Reconfigurable routers • use recent developments in run-time reconfigurable hardware and hardware/software co-design techniques to improve both the performance and functionality of the network routers • so that the new protocols can be deployed rapidly • Routers based on the reusable elements • click modular router • Parallelism by partitioning functions of routers

7. Motivation for Router Models • Define high level models of router behavior • Construct routers by proof • Explore the design space to optimize hardware and software performance of routers • Support from verification and simulation tools • Reuse previous designs • Provide function decomposition of routers • If possible, synthesize part or all of the hardware and software

8. . . . . . . Overview of the Simulated Networks and Router Subnetwork 1 Subnetwork 3 9 0 8 1 Router 7 2 interface3 interface1 interface2 3 4 5 6 Subnetwork 2

9. Basic Model • Model the data-plane of the router • Model major components in the DE domain • Three input interfaces, three output interfaces • Packets generated by a Poisson process • QoS implemented using priority-based scheduling for packets

10. fabric input interface output interface Model and Screen Shot

11. Run Window

12. Problems Identified • Main bottlenecks in routers are • LookUp • Switching Fabric We worked on the LookUp design improvement

13. LookUp • Slow LookUp speed creates a bottleneck • Solution : Parallelize the LookUp block • Propertiesdesired: • Ordering of the packets should be maintained • System should not deadlock • Bounded memory constraints are not violated

14. Verification of desired Properties • The block can be represented well in the DF domains • BDF seems to be a good choice • but the present formalism is not powerful enough to handle the model under consideration • Our Solution: Model the block in the SDF domain. • This adds a little redundancy but we get good enough solution with the verification of desirable properties

15. Model in BDF Domain

16. Model in SDF Domain

17. Related Problems • What input rates can the router support? • With the above rates, will the available memory be sufficient to prevent overflow (with probability .99)? The above problems can be solved using a probabilistic framework but could be quite complex

18. General Problem Formulation • SYSTEM: Composed of a multitude of components, each of them capable of being modeled in timed/untimed domains. • AIM: Want to check properties like bounded memory. Can we use modeling to make this problem simpler?

19. Our Solution • If possible, model some components in the DF domains • Abstract these components with their cumulative properties • Using the above properties, consider the timed model (like DE) of the system for checking these properties in a probabilistic framework • This interaction among the timed and the untimed models could be used to make the problem simpler

20. Conclusions • Verification is easy in some domains. • Hence one might need to modify the component design to model them in these domains in order to verify the desirable properties • In system design, abstracting the interaction between the timed and untimed models can help simplify problems