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Learn about binary decision diagrams (BDDs) and their applications in the synthesis and verification of digital systems. Understand the construction, reduction rules, and logical manipulation of BDDs. Explore canonical representations and their importance in verification. Recommended reading: BDD tutorials by Anderson or Somenzi.
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ECE 697B (667)Spring 2006Synthesis and Verificationof Digital Systems Binary Decision Diagrams (BDD)
Outline • Background • Canonical representations • BDD’s • Reduction rules • Construction of BDD’s • Logic manipulation of BDD’s • Application to verification and SAT • Reading: read one of the BDD tutorials available on class web site • Anderson, or • Somenzi ECE 667 - Synthesis & Verification - Lecture 10
Common Representations • Boolean functions ( f : B B ) • Truth table, Karnaugh map • SoP, PoS, ESoP • Reed-Muller expansions (XOR-based) • Decision diagrams (BDD, ZDD, etc.) • Each minimal, canonical representation is characterized by • Decomposition type • Shannon, Davio, moment decomposition, Taylor exp., etc. • Reduction rules • Redundant nodes, isomorphic sub-graphs, etc. • Composition method (“Apply”, compose rule) • What they represent • Boolean functions (f : B B) • Arithmetic functions (f : B Int ) • Algebraic expressions (f : Int Int ) ECE 667 - Synthesis & Verification - Lecture 10
Binary Decision Diagrams (BDD) • Based on recursive Shannon expansion f = x fx + x’ fx’ • Compact data structure for Boolean logic • can represents sets of objects (states) encoded as Boolean functions • Canonical representation • reduced ordered BDDs (ROBDD) are canonical • essential for verification ECE 667 - Synthesis & Verification - Lecture 10
ROBDD’s • Directed acyclic graph (DAG) • one root node, two terminals 0, 1 • each node, two children, and a variable • Shannon co-factoring tree, except reduced and ordered (ROBDD) • Reduced: • any node with two identical children is removed • two nodes with isomorphic BDD’s are merged • Ordered: • Co-factoring variables (splitting variables) always follow the same order along all paths xi1 < xi2 < xi3 < … < xin ECE 667 - Synthesis & Verification - Lecture 10
Example Two different orderings, same function. root node a f = ab+a’c+bc’d a 1 c+bd b c c+bd b b 0 c+d d d+b c c c d b b d 0 1 0 1 ECE 667 - Synthesis & Verification - Lecture 10
ROBDD Ordered BDD (OBDD) Input variables are ordered - each path from root to sink visits nodes with labels (variables) in ascending order. not ordered ordered order = a,c,b a a c c c b b b c 1 1 0 0 Reduced Ordered BDD (ROBDD) - reduction rules: • if the two children of a node are the same, the node is eliminated: f = vf + vf • if two nodes have isomorphic graphs, they are replaced by one of them These two rules make it so that each node represents a distinct logic function. ECE 667 - Synthesis & Verification - Lecture 10
f v 0 1 fv fv Efficient Implementation of BDD’s • BDDs is a compressed Shannon co-factoring tree: • f = v fv + v fv • leafs are constants “0” and “1” • Three components make ROBDDs canonical (Proof: Bryant 1986): • unique nodes for constant “0” and “1” • identical order of case splitting variables along each paths • hash table that ensures: • (node(fv) = node(gv)) Ù (node(fv) = node(gv)) Þ node(f) = node(g) • provides recursive argument that node(f) is unique when using the unique hash-table ECE 667 - Synthesis & Verification - Lecture 10
Onset is Given by all Paths to “1” F = b’+a’c’ = ab’+a’cb’+a’c’all paths to the 1 node Notes: • By tracing paths to the 1 node, we get a cover of pair wise disjoint cubes. • The power of the BDD representation is that it does not explicitly enumerate all paths; rather it represents paths by a graph whose size is measures by its nodes and not paths. • A DAG can represent an exponential number of paths with a linear number of nodes. • BDDs can be used to efficiently represent sets • interpret elements of the onset as elements of the set • f is called the characteristic function of that set f a 0 1 fa = cb’+c’ c 1 fa= b’ b 0 0 1 0 1 ECE 667 - Synthesis & Verification - Lecture 10
f f v 1 0 mux v 0 1 g h g h Implementation Variables are totally ordered: If v< w then v occurs “higher” up in the ROBDD Top variable of a function f is a variable associated with its root node. Example:f = ab + a’bc + a’bc’. Order is (a < b < c). fa = b, fa = b b is top variable of f f a f b reduced f does not depend on a, since fa = fa . Each node is written as a triple:f = (v,g,h) where g = fv and h = fv . We read this triple as: f = if v then g else h = ite (v,g,h) = vg+v ’ h b 0 1 0 1 v is top variable of f ECE 667 - Synthesis & Verification - Lecture 10
f = ac + bc f 1 edge a b c f 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 1 1 1 0 0 1 1 1 1 0 edge a b b c c c c 0 0 0 0 0 1 1 1 Truth table Decision tree BDD Construction • Reduced Ordered BDD ECE 667 - Synthesis & Verification - Lecture 10
f a f = fa g(b) + fa’ g(b) = g(b) (fa + fa’ = 1) g g b b BDD Reduction Rules -1 • Eliminate redundant nodes (with both edges pointing to same node) ECE 667 - Synthesis & Verification - Lecture 10
f f1 f2 a a a h g h g b c b c f1 = fa’ g(b) + fa h(c) = f2 f = f1 = f2 BDD Reduction Rules -2 • Merge duplicate nodes (isomorphic subgraphs) • Nodes must be unique ECE 667 - Synthesis & Verification - Lecture 10
f f f = (a+b)c a a a b b b b b c c c c c c c 0 0 0 1 1 1 • 2. Merge duplicate nodes 3. Remove redundant nodes 1. Merge terminal nodes BDD Construction – cont’d ECE 667 - Synthesis & Verification - Lecture 10
F G G F = 0 0 1 1 0 1 APPLY Operator • Useful in constructing BDD for arbitrary Boolean logic • Any logic operation can be expressed using Apply (ITE) • Efficient algorithms, work directly on BDD graphs • Apply: F G, any Boolean operation (AND, OR, XOR, ) ECE 667 - Synthesis & Verification - Lecture 10
F F’ ¬ F(y) F(x,y) Restrict x=b 0 0 0 1 1 1 1 0 Logic Manipulation using BDDs • Useful operators • Complement ¬ F = F’ • (switch the terminal nodes) • Restrict: F|x=b = F(x=b) where b = const ECE 667 - Synthesis & Verification - Lecture 10
Useful BDD Operators – Apply Operation • Basic operator for efficient BDD manipulation (structural) • Based on recursive Shannon expansion F OP G = x (FxOP Gx) + x’(Fx’OP Gx’) whereOP = OR, AND, XOR, etc ECE 667 - Synthesis & Verification - Lecture 10
F G G F = 0 0 1 1 0 1 Apply Operation (cont’d) • Apply: F G where stands for any Boolean operator (AND, OR, XOR, ) • Any logic operation can be expressed using only Restrict and Apply • Efficient algorithms, work directly on BDDs ECE 667 - Synthesis & Verification - Lecture 10
a AND c ac a 2 a a = = c 3 1.3 2.3 AND c c 1.0 0.3 0 0 0 1.1 1 1 1 Apply Operation - AND ECE 667 - Synthesis & Verification - Lecture 10
ac f = ac+bc bc 4 a 6 b a a OR b 5 7 = = b 0+7 0+6 0+5 4+6 6+5 7+5 c c c c 0+0 0 0 0 0 1 1 1 1 Apply Operation - OR ECE 667 - Synthesis & Verification - Lecture 10
a a F = a’bc + abc +ab’c G = ac +bc b b c c 0 0 1 1 Application to Verification • Equivalence Checking of combinational circuits • Canonicity property of BDDs: • if F and G are equivalent, their BDDs are identical (for the same ordering of variables) ECE 667 - Synthesis & Verification - Lecture 10
H a ab b c 1 0 ab’c Application to SAT • Functional test generation • SAT, Boolean satisfiability analysis • to test for H = 1 (0), find a path in the BDD to terminal 1 (0) • the path, expressed infunction variables, gives a satisfying solution (test vector) • Problem: size explosion ECE 667 - Synthesis & Verification - Lecture 10
Efficient Implementation of BDD’s Unique Table: • avoids duplication of existing nodes • Hash-Table: hash-function(key) = value • identical to the use of a hash-table in AND/INVERTER circuits Computed Table: • avoids re-computation of existing results hash value of key collision chain hash value of key No collision chain ECE 667 - Synthesis & Verification - Lecture 10