Last lecture: AVR Simulator avr-gcc, avr-objdump, make ISR – Interrupt Service Routines

1. Microprocessor based Design for Biomedical ApplicationsMBE 3 – MDBAIV :The ATmega8Basic Features (3)

2. Last lecture:AVR Simulator avr-gcc, avr-objdump, make ISR – Interrupt Service Routines Timer Interrupt Example Uart – Configuration and Modes Uart Example

3. Today:Interrupt driven Uart Communication Setup stdio- functions, printf RS232 and alternatives to RS232 Atmega8 Analog Digital Conveter Analog Comparator Review Uart project, Interrupt Driven Uart example

4. The USART Data Register● Transmit- and Receive Buffer (TXB and RXB) share the same address● Reading from UDR returns current contents of the RXB Writing to UDR stores value to TXB and initiates transmission● ISR must read/write data from/to UDR or disable the UDR-Interrupt

5. Example: Interrupt driven UART communication Initialisation:void init_uart (unsigned long baudrate) { unsigned int ubrr = (F_CPU/16/baudrate)-1;// Set baud rate UBRRH = (unsigned char)(ubrr>>8); UBRRL = (unsigned char)(ubrr&0xff); // Enable receiver and transmitter UCSRB = ( 1<<TXEN | 1<<RXEN ); // select character size, stop and parity bits: 8N1 UCSRC = ( 1<<URSEL | 1<<UCSZ1 | 1<<UCSZ0 );// enable receive complete interrupt UCSRB |= (1<<RXCIE);}

6. Example: Interrupt driven UART communication Data Reception:● Set Receive Complete Interrupt Enable bit RXCIE in UCSRB and enable global interrupts: sei()● USART_RXC_vect Interrupt will be called as long as new bytes are ready in the UDR● ISR must read data from UDR or disable the RXCIE-Interrupt

7. Example: Interrupt driven UART communication Data Reception using RXC-Interrupt :ISR (USART_RXC_vect) // interrupt service routine USART character received { static int rxindex=0; // receive buffer index// read UDR and store received character RXBuf[rxindex++] = UDR; }

8. Example: Interrupt driven UART communication Data Transmission:● Set Data Register empty Interrupt Enable – Bit UDRIE in UCSRB and enable global interrupts: sei()● USART_UDRE_vect - Interrupt will be called as long as UDR is empty● ISR must write new data to UDR or disable the UDRE-Interrupt

9. Example: Interrupt driven UART communication Data Transmission using UDRE Interrupt:(…) UCSRB |= ~(1<<UDRIE); (…) // enable UDRE-interrupts ISR (USART_UDRE_vect)// interrupt service routine UART Data Register empty { static int txindex=0; // transmit buffer index if (TXBuf[txindex]) // characters left ? UDR=TXBuf[txindex++]; // send current character from the buffer else { txindex=0; UCSRB &= ~(1<<UDRIE); } // Disable USART_UDRE interrupts, // reset character index}

10. Setup of the stdio-functions: ● AVR Libc supports stdin, stdout and stderr devices needed for printf, scanf and stream I/O ● no standard in/output device is defined for the microcontroller ● the I/O-subsystem has to be initialised -> setup functions for character based IO: FILE * fdevopen ( int (*) (char, FILE*) put , int (*) (FILE*) get); ● fdevopen() replaces fopen() the first write device is used for stdout, stderr; the first read-device is used for stdin ● these functions can use any physical medium / bus ● beware: printf is useful but need lots of memory (floating point conversion routines etc.)

11. Setup of the stdio-functions: int uart_putchar_file(char c, FILE * fp) // helper function to put out a character on the UART{ if (c == '\n') uart_putchar_file('\r',0); // add a carrige return to a line feed character loop_until_bit_is_set(UCSRA, UDRE); // wait until the Data Register Empty bit is set UDR = c; // send out the character return(0);}( …) fdevopen(uart_putchar_file, NULL); printf (" The value is %.2f \n", (float) val ); ( …)

12. USART – RS232 Level Converter ● RS232 – Levels (10/-10 V) extend transmission distance● Max 232: 2 TTL inputs -> RS232 outputs 2 RS232 inputs -> TTL outputs

13. RS232 Alternatives

14. UART – USB Converter Solutions Example: FTDI 232 / FTDI245 converter chips ● connect directly to UART ● provide USB enumeration Device IDs (Eeprom) ● royality free Driver for Win / Linux generates virtual Com Port (VCP) ● data rates up to 1 MBit/s ● 5V and 3.3V designs supported ● Bus-powered and self-powered configurations

15. UART – USB Converter Solutions ●UM232 Dip – Module with Crystal and USB- Plug ●FT245 based parallel FIFO Module up to 3MBit/s ●Vinculum VDrive USB Host controller USB Flash Drive <-> UART Interface http://www.ftdichip.com

16. Wireless communication: UART <-> Bluetooth Example: Bluegiga WT11 – module http://www.bluegiga.com ● Class 1 BT Device (<300m) ● on-chip or external antenna ● UART, SPI, USB busses ● iWrap firmware ( AT - like commandset ) ●RFCOMM, HCI, HID stacks and Serial Port Profile

17. The Analog Digital Converter ● 10-bit Resolution (8-bit Accuracy on ADC4 and ADC5) ●Up to 15 kSPS at Maximum Resolution ●6 Multiplexed Single Ended Input Channels ●8 Multiplexed Single Ended Input Channels in TQFP / MLF Package ●0 - VCC ADC Input Voltage Range ●Selectable internal 2.56V Reference Voltage ●Free Running or Single Conversion Mode ●Interrupt on ADC Conversion Complete ●Sleep Mode Noise Canceler http://www.reedag.ch

18. The Analog Digital Converter ●A/D conversion by successive approximation: DAC and comparator Min: 0x0000 = GND Max: 0x03FF = AREF-1LSB ●Internal 2,56V reference: do not connect external voltages to AREF if internal reference is used ●Channel multiplexer select input channel before conversion starts

19. The Analog Digital Converter Successive approximation: ●Starting with the MSB, test values are generated converted to analog (DAC) ●Result of comparation influences current bit in approximation register ●After n bits, the result is latched out

20. The Analog Digital Converter Types of Conversion Errors: Offset error Gain error Non-linearity ●0.5 LSB Integral Non-linearity ● ± 2 LSB Absolute Accuracy ATmega8 – ADC:

21. The Analog Digital Converter ●ADC Clock should run at 50kHz – 200kHz to give full resolution ●Prescaler generates ADC clock from CPU clocks >= 100 kHz ●ADPS2:0 bits of ADCSRA Register select clock prescaler value

22. The Analog Digital Converter Single / First conversion takes 25 ADC clock cycles Free running conversions take 13 ADC clock cycles After the conversion is complete (ADIF is high), the conversion result can be found in the ADC Result Registers (ADCL, ADCH)

23. The Analog Digital Converter ADEN: ADC Enable ADSC: ADC Start Conversion start a single conversion or free running mode ADFR: ADC Free Running Select 1: continuous sampling and update of data registers ADIF: ADC Interrupt Flag ADIE: ADC Interrupt Enable Reset pending interrupts by writing 1 to the ADIF-Bit !

24. The Analog Digital Converter REFS1:0 Reference Selection Bits 00: external AREF, 01: AVCC, 11: internal 2,56V reference ADLAR: ADC Left Adjust Result 1: result is left adjusted, 0: result is right adjusted MUX3:0: select the A/D input channel: 0000: ADC0 – 0111: ADC7, 1110: 1,23V, 1111: GND

25. The Analog Digital Converter Handling of the ADC Data Registers (ADCL, ADCH): ADLAR=0 ADLAR=1 ● read Low Byte (ADCL) first, then high byte (ADCH) ●If only 8 bits resolution are needed, use left adjustment and read only high byte

26. The Analog Digital Converter ADC Noise canceler: ● conversion during sleep mode to reduce noise induced from the CPU core and other I/O peripherals ● select single conversion mode and enable ADC interrupts Enter ADC Noise Reduction mode (select sleep mode „Idle“) ● ADC conversion be will start automatically after CPU is put to sleep using the sleep () command ● ADC interrupt (or other interrupt) will wake up the CPU ● next conversion will be issued after next sleep - command

27. The Analog Digital Converter General issues for using the A/D converter ● connect low impedance sources ( < 10kOhm) to achieve fast sampling rates ● do not connect signals with frequencies higher than the Nyqist frequency (half the sampling frequency) ● Use a low-pass filter to remove higher frequency components to prevent aliasing ● Keep analog signal paths as short as possible

28. The Analog Digital Converter General issues for using the A/D converter ●Make sure analog tracks run over the analog ground plane, keep them well away from high-speed switching digital tracks ● Use an LC network to connect AVCC (low pass filter the supply voltage)

29. The Analog Digital Converter Example: Initialisation for Interrupt driven AD Conversion ADCSRA = (1<<ADPS2) | (1<<ADPS1); // Prescaler = 64, free running mode = off, interrupts off // prescaler = 64 (ADPS2 = 1, ADPS1 = 1, ADPS0 = 0) // ADCYCLE = 7,3728Mhz / prescaler = 115200Hz or 8.68 us/cycle // 14 (single conversion) cycles = 121.5 us (8230 samples/sec) // 26 (1st conversion) cycles = 225.69 us ADCSRA |= (1<<ADIF); // Reset any pending ADC interrupts ADCSRA |= (1<<ADEN); // Enable the ADC ADCSRA |= (1<<ADIE); // Enable ADC interrupts ADMUX=0; // Select ADC channel 0 ADCSRA |= (1<<ADSC); // single conversion: Start the ADC

30. The Analog Digital Converter Example: ADC Interrupt Service Routine ISR(ADC_vect) // AD-conversion-complete interrupt service routine { unsigned char low,high; unsigned int value; low = ADCL; // read ADC value (low byte first !) high = ADCH; // read ADC value high byte value = (high<<8) + low; // calculate integer value }

31. The Analog Comparator

32. The Analog Comparator ACD: Analog Comparator Disable: 1 turns AC off ACBG: Analog Comparator Bandgap Select ‚1‘ selects internal reference voltage ACO: Analog Comparator Output ACI: Analog Comparator Interrupt Flag ACIE: Analog Comparator Interrupt Enable ACIC: Analog Comparator Input Capture Enable ‚1‘ triggers Timer1-capture-interrupts (if enabled) ACIS1,0: Analog Comparator Interrupt Mode Select 00: toggle, 10: falling edge, 11: rising edge

33. The Analog Comparator ACME (Bit 3 of SFIOR): Analog Comparator Multiplexer Enable if ACME set 1, the ADC – Channel selected by ADMUX is used as negative comparator input instead of AIN1