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KS-Note 3 System Power Sequence. Prepared By : PE/TQ Zhao 2007/02/23. KS-Note3 Function structure. Test System Configurations. KS3 Note &Dali2 Note DC-DC & Power Net DIAGRAM (DV). VCC5M. 4.5A. Power Budget.
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KS-Note 3 System Power Sequence Prepared By : PE/TQ Zhao 2007/02/23
KS3Note &Dali2 Note DC-DC & Power Net DIAGRAM (DV) VCC5M 4.5A Power Budget Ultra Slim Bay Other 4.5A DOCK-PWR20_IN 0.1A MICVCC CV20 LP3985IM5-4.7 AC ADAPTER -SLICE_ON_19 4.5A B_ON x 3ch VBL20 0.5A x 3 VINT20 1.0A 7A 3A USB_PWR1,2,3 TPS205X ACDC_ID DCIN_DRV USB_ON +5V DC-DC VCC5M VCC5B 0.5A x 4 7.0A HDD (SATA) -90W_AC x 4ch 5B_DRV VCC3SW USB_PWR ACOK# VCC5B_FAN -EXTPWR BATTERY CHARGER 4.1V / 4.2V / 4.3V / 4.4V 3cell / 4cell 3.5A / 1.8A Trickle 50-220mA 2.0A VCC3M FANON CHARGE_VOLT_4D35V CHARGE_VOLT_4D2V -LPMODE IINP +1.25V CHARGE_CELL0 DC-DC REF 3A CHARGE_CELL1 CS2-X SLICE +3.3V DC-DC 1.8A VCC1R25AMT CHARGE_CURRENT_1R8D 1.1A VCC1R25B RINKAN-1 VT321 VDD15 BAT_CRG M_TRCL VCC3M B_ON 0.6A MAX8765 S_TRCL UVP MAX8744 VCC3SW 5.5Aav, 6.5Apk CARD BUS 1A 3.3V Regulator CHARGER_OUT 1.1A(AV), 2.75A(PK) VCC3B 8.0A, 10A(peak) VCC1R05B 0.45A +1.05V LOW BATT -PWRSHUTDOWN HDD (PATA 18) CPUVCCP : 2.5A GMCH V1.05S : 3.9A ICH8M : 1A DC-DC 3B_DRV DETECTOR 0.2A 0.2A VCC3AUX 30mA MDC 15 VCC3AUX2_ON 0.5A XXX_ON 15 4.5A 1.0A VCC1R5M XXX_DRV VCC3P +1.5V 0.5A VREGIN20 MPWRG 2.0A DC-DC VCC3P5P_DRV APWRG 0.2A VCC1R5B FingerPrint BPWRG 0.5A 2.4A MAX1540 0.1A VCC3M_LCDIF B_ON LDO 0.5A (to PANEL) 0.5A 0.5A MAIN VCC1R05M VCC3AMT 1.0A BATT 1.2A M-BAT-PWR 7.0A VCC1R05AMT BAT-PWR17 10A GMCH : 0.97A ICH8M : 0.037A VCC3AMT_ON AC ADAPTER VCC3AMT_ON I2C_CLK_BT0 4.5A M1_DRV M2_DRV BATOUT_DRV DOCK-PWR20_IN I2C_DATA_BT0 VCC1R05AUX 7A M_TEMP GBE : 0.16A GMCH DC-DC VCC3AUX_ON (VBAT - 5 ) x TBD 7A (15A max) M_BATVOLT VCCGFXCORE BAY BATTERY (VBAT - 5 ) x TBD S_BATVOLT ADP3209 7.0A 10A SBAT_IN 6.5A VCC1R8M 5.6A +1.8V VCC1R8A I2C_CLK_BT1_R DC-DC BATMON_EN Memory : 1.4A DDR : 4.1A I2C_DATA_BT1_R VCC1R8AUX VCC1R8A_ON GBE : 0.42A S_TEMP DDR-II MAX8632 VCC3AUX_ON 1.0A VCC0R9A 0.26A 10A SBAT_IN VCC1R8B VCORE 7.0A S-BAT-PWR GMCH LVDS VCCCPUCORE 44A (Merom) **A (LV) *A (ULV) DC-DC B_ON S2_DRV S1_DRV Current Monitor I2C_DATA / CLK ADP3207
Time Sequence AC-IN AC-OUT DOCK_PWR20 DOCK_PWR20_F VREGIN20 About 0.8ms VCC3SW -EXTPWR_PMH About 20ms VCC3M VCC5M About 30ms VCC1R05M VCC1R5M About 35ms VCC1R8M MPWRG VCC1R05AUX About 78ms VCC1R8AUX VCC3LAN
Time Sequence Power ON Power OFF -PWRSWITCH -PWRSW -PWRSW_H8 About 6.2 s -PM_SLP_S3 About 50ms -PM_SLP_S4 About 6.0 s -ICH_SLP_S3 -ICH_SLP_S4 VCC1R25AMT About 60ms About 6.7 s VCC1R05AMT VCC3AMT AMTPWRG VCC1R8A About 88ms About 6.1 s VCC0R9A APWRG VCC3B About 110ms VCC5B About 6.4 s VCC1R05B VCC1R5B About 118ms VCC1R25B VCC1R8B About 600ms BPWRG VCCGFXCORE VCC3WAN About 120ms VCCCPUCORE CPUPWRGD About 500ms -PCIRST -CPURST
AC IN • 1
AC IN Dock_PWR20 Dock_PWR20_F VREGIN20 U74 VREGIN20 VCC3SW 因此只要Power VREGIN20 Supply to U69 , 無須控制信號U69產生VCC3SW
AC IN • 2
AC IN U11 VINT20 CV20 When AC in , then U68 triger -EXTPWR_PMH
AC IN • 3
AC IN • 4
AC IN R455 VCC5M_ON M1_ON R454 VCC3M_ON
AC IN • 5
AC IN R425 VCC1R5M_ON R440 VCC1R05M_ON M2_ON R434 VCC1R8M_ON
AC IN • 5
AC IN U59 R455 VCC5M_ON VCC5M M1_ON R454 U59 VCC3M_ON VCC3M
AC IN • 6 VCC3/5M Power to MPWRG is 45-55ms
AC IN • 7
AC IN U22 VCC1R8M_ON VCC1R8M U82 VCC1R5M_ON VCC1R5M U35 VCC1R05M VCC1R05M_ON
AC IN • 8
AC IN VCC1R8AUX VCC1R8M Q78 VCC1R8AUX_DRV
AC IN • 9
AC IN VCC3LAN VCC3M U100 VCCLAN_ON
Power On • 1
Power On • 2
Power On • 3
Power On • 4
Power On • 5
Power On • 4
Power On When PWRSWITCH Tiger, U68 will send the signal A1_ON,B1_ON and B2_ON
Power On • 5
Power On • 6
Power On VCC1R8A U69 A1_ON U60 Pin25 U21 U24 VCC1R8M
Power On • 7
Power On VCC0R9A R976 VCC0R9A_ON AMT_ON U22 VCC5M
Power On • 8
Power On • 9
Power On VCC3B VCC3B_DRV Q77 VCC3M
Power On • 10
Power On VCC5B VCC5B_DRV Q59 VCC5M
Power On • 11
Power On • 12
Power On VCC1R05B B_ON
Power On • 13