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The CPU. Parts of the CPU. C ontrol Unit A rithmetic & Logic Unit R egisters. Control Unit. Send out the signals to fetch instructions from memory. Interpret those instructions Send out signals to enable instructions to be carried out. This is known as the fetch execute cycle.
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Parts of the CPU • Control Unit • Arithmetic & Logic Unit • Registers
Control Unit • Send out the signals to fetch instructions from memory. • Interpret those instructions • Send out signals to enable instructions to be carried out. • This is known as the fetch execute cycle
Arithmetic & Logic Unit • Carries out arithmetic calculations • Carries out logic operations (AND/OR)
Registers • Temporary storage locations in processor itself • Store data during calculations • Store the address of the next instruction to be executed • Hold the instruction as it is being decodedand executed
Registers • Program Counter (PC) - Stores the memory address of the next program instruction • Instruction Register (IR) - Holds the code for the current instruction • Accumulator (ACC) - Holds values before and after processing by the ALU • Memory Data Register (MDR) - Holds data prior to a memory write or after a memory read. • Memory Address Register (MAR) - Holds the address of the memory location to be accessed.
Buses • Address Bus • Data Bus • Control Bus • Other internal buses which transfer data inside the CPU
Address Bus • used by the processor to pinpoint the memory location, needed • this is a one-way bus.
Data Bus • used to transfer the data • its size will usually match the word size i.e. the size of the memory locations • this is a two-way bus.
Control Bus • initiates and controls whatever process is taking place • Read Line – initiates memory read operation. • Write Line - initiates memory write operation. • Clock – Generates pulse to synchronise components. • Interrupt – Signal to processor of an interrupt like a key press or mouse click. Processor saves stack and deals with the interrupt. • NMI – Non-Maskable Interrupt. Interrupt which cannot be ignored. • Reset – Clears all registers, aborts program and gives control back to the operating system.
The Fetch Execute Cycle In Action Click on the next slide to show the next step
2 1 101 PC IR Data Bus 101 ACC MDR Address Bus 1 MAR READ LINE Control Unit WRITE LINE Arithmetic Logic Unit Decode the instruction The contents of memory is transferred to the MDR Add one to the program counter Copy contents of MDR to IR Execute the instruction The program counter is copied into the MAR The read control line is activated