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Lecture 5 Logical, Bitwise, and Multiplication/Division Operations. Presented By Dr. Rajesh Palit Asst. Professor, EECS, NSU Originally Prepared By Dr. Shazzad Hosain , EECS, NSU. Agenda. Logic Instructions AND, OR, XOR and NOT TEST Instruction Shift and Rotate Instructions
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Lecture 5Logical, Bitwise, and Multiplication/Division Operations Presented By Dr. Rajesh Palit Asst. Professor, EECS, NSU Originally Prepared By Dr. ShazzadHosain, EECS, NSU
Agenda • Logic Instructions • AND, OR, XOR and NOT • TEST Instruction • Shift and Rotate Instructions • Multiplication and Division
AND, OR and XOR Instructions • AND destination, source • OR destination, source • XOR destination, source • Memory-to-memory operations are not allowed • Effect on flags • SF, ZF, PF reflect the result • CF, OF = 0
Use of Logic Instructions • Selectively modify the bits of destination • b AND 1 = b (b represents a bit, 0/1) • b AND 0 = 0 • b OR 0 = b • b OR 1 = 1 • b XOR 0 = b • b XOR 1 = ~b (complement of b) • So, AND cab be used to clear specific destination bit • OR can be used to set specific destination bit • XOR can be used to complement specific destination bit
Examples Example 7.2: Clear the sign bit of AL while leaving the other bits unchanged. AND AL, 7Fh Example 7.3: Set the msb and lsb of AL while preserving the other bits. OR AL, 81h Example 7.4: Change the sign bit of DX XOR DX, 8000h 0111 1111 = 7Fh 1000 0001 = 81h
NOT Instruction Complement operation NOT destination Example 7.5: Complement the bits in AX NOT AX
Agenda • Logic Instructions • AND, OR, XOR and NOT • TEST Instruction • Shift and Rotate Instructions • Stack Operations • Introduction to Procedures
TEST Instruction • TEST performs AND on the destination • TEST destination, source • Effects on flags • SF, ZF, PF reflect the result • AF is undefined • CF, OF = 0 • TEST vs. CMP • CMP is subtraction operation
TEST Example • Jump to label BELOW if AL contains an even number TEST AL, 1 ; is AL even? JZ BELOW ; yes, go to BELOW
Agenda • Logic Instructions • AND, OR, XOR and NOT • TEST Instruction • Shift and Rotate Instructions • Stack Operations • Introduction to Procedures
Shift and Rotate Instructions • Two types of shift and rotate instructions • Logical Shift / Rotate • Arithmetic Shift/Rotate • Both logical and arithmetic left shift are identical • But right shifts are different
Shift and Rotate Instructions SHL DH, 3 ; DH = 1110 1111 SHR DH, 3 ; DH = 1110 1111 DH = 0111 1000 DH = 1011 1100 DH = 0001 1101 DH = 1111 1011 C = 1 C = 1 C = 1 C = 1 SAL DH, 2 ; DH = 1110 1111 SAR DH, 2 ; DH = 1110 1111
Rotate Instructions Let DH = 8Ah = 1000 1010 CF = 1 After first RCR DH = 1100 0101 CF = 0 After second RCR DH = 0110 0010 CF = 1
Multiplication / Division • Unsigned Integers MUL / DIV • Signed Integers IMUL / IDIV • A = 1000 0000 => 128 -128 • B = 1111 1111 => 255 -1 • Unsigned AxB = 0111 1111 1000 0000 34640 • Signed AXB = 0000 0000 1000 0000 128
Multiplication • MUL source • source is 8/16 bit reg/mem • source can’t be a immediate value • Multiplicand is assumed to be in AL/AX • source x AL = AX • Source x AX = DX:AX • CF/OF – 0, 1 MUL upper-half = 0 / non-zero • For IMUL, CF/OF 0 means signed extension of the lower half, 1 means otherwise
ARITHMETIC EXPRESSION • A = 5 x A – 12 x B • A dw 10 • B dw20 • MOV AX, 5 • IMUL A • MOV A, AX • MOV AX, 12 • IMUL B • SUB A, AX
Factorial Calculation MOV AX, 1 MOV CX, 5 TOP: MUL CX LOOP TOP
Division • DIV and IDIV • DIV divisor • divisor is 8/16 bit reg/mem, not immidiate value • dividend is in AX or DX:AX • Quotient is in AL/AX • Remainder is in AH/DX • Divide Overflow
Assignment - 1 • String to number • Perform Arithmetic Operations
References • Ch 7, Assembly Language Programming – by CharlsMarut • Ch 4, Intel Microprocessors – by Brey