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ICS312 Set 3

ICS312 Set 3. Pentium Registers. Intel 8086 Family of Microprocessors . All of the Intel chips from the 8086 to the latest pentium, have similar architectures and use the same core assembly language. . REGISTERS AVAILABLE TO ASSEMBLER PROGRAMMER. General registers

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ICS312 Set 3

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  1. ICS312 Set 3 Pentium Registers

  2. Intel 8086 Family of Microprocessors All of the Intel chips from the 8086 to the latest pentium, have similar architectures and use the same core assembly language.

  3. REGISTERS AVAILABLE TO ASSEMBLER PROGRAMMER • General registers • Pointer and Index Registers • Flags register • Segment registers

  4. The registers are 8-bit, 16-bit, or 32-bit, high- speed storage locations inside the CPU which can be accessed through the CPU's internal data bus much more quickly than data stored in external memory.

  5. Register Name Upper Half Lower Half  Name and Special Functions (besides arithmetic): EAX AX no name AH AL EBX BX Accumulator no name BH BL Used for I/O ECX CX CH CL EDX DX DH DL Base Register Used for indirectly addressing items in the data segment Count Register Used for counting Data Register General Purpose or Data Registers The general purpose registers are used for arithmetic operations and moving data

  6. Register Name Abbreviation Function Destination Index EDI (32 bit) or DI (16 bit)  Index into data segment , but for the string instructions it’s the index into segment ES Source Index ESI or SI  Index into data segment Base Pointer EBP or BP  2nd Index into stack Stack Pointer ESP or SP  Indexes top of stack Pointer and Index Registers oThese are used to hold the offset addressesof data and instructions.  oOffset addresses refers to the distance of a variable, label, or instruction from the beginning of its segment O Can also be used for arithmetic and moving data

  7. Flags Register (EFLAGS or FLAGS) oIndividual bits in the FLAGS register give information about the status of the processor. oThe use of flags will be discussed further later. oStatus flags - reflect the results of instructions (add, subtract, multiply, divide) executed by the processor. oFrequently used flags Zero flag(ZF) Sign flag(SF) Carry flag(CF) Overflow Flag (OF)

  8. Register Name Abbreviation The function of the segment whose starting address is encoded in the segment register involved Code Segment CS Holds program code Data Segment DS Holds program data Extra Segments ES, FS, GS Also used for data Stack Segment SS Holds program stack Segment Registers 16-bit registers that hold the base locations(base addresses) for program instructions, data, and the stack

  9. Memory Segments oMemory segments contain 216(64K) consecutive memory addresses oEach segment has a 16 bit segment number (0-FFFFh) which is placed in a associated segment register oWithin a segment a memory address is specified by a 16-bit offset (0-FFFFh) which indicates the number of bytes from the beginning of the segment

  10. Memory Address Logical memory addresses are given in SEGMENT:OFFSET form. Examples:      0FF0Eh:0010h    CS:IP    DS:SI    ES:DI    SS:SP Physical (absolute) memory addresses are calculatedusing the formula:  Physical Address = 10h * SEGMENT + OFFSETExample: Logical Address (using hex nos.):  0FF0E:0010  Physical Address: 0FF0E0 + 0010 = 0FFF00 Note. Logical Addresses are not unique. e.g. 0FF0E:0010 = 0FF0D:0020

  11. Instruction Pointer (EIP or IP) oGives the offset address (in the code segment) for the next instruction to be executed. oThe IP cannot be used as the operand of any instruction.

  12. Textbook Reading (Jones): Read chapter 2, which provides an Assembler overview

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