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Key Thoughts

ITRS Roadmap Design + System Drivers 2006 Summer Meeting San Francisco, July 10-12 Worldwide Design TWG. Last year we created a Design Technology Roadmap System-level, logic/ckt/phy, DFT, Verification, DFM, General dependency: PIDS, yield, interconnect, A&P,…

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Key Thoughts

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  1. ITRS Roadmap Design + System Drivers2006 Summer MeetingSan Francisco, July 10-12Worldwide Design TWG

  2. Last year we created a Design Technology Roadmap System-level, logic/ckt/phy, DFT, Verification, DFM, General dependency: PIDS, yield, interconnect, A&P,… This year we’re creating a Systems Driver roadmap Consumer stationary, networking, auto Driver-specific dependency: PIDS, interconnect, A&P,… Added value = design technology + design innovation Design technology: general value add Design innovation: driver-specific value add Key Thoughts

  3. 2006 Design

  4. Working Table For Design Chapter

  5. System Drivers Chapter

  6. ITRS-iNEMI Domain Space iNEMI (emulators) Market requirements ITRS (Drivers) Tech requirements Chip level System level

  7. Technology Waves And (VC) Investment Digital Bio Medical Cleantech Digital media Emerging Geos Consumer $20+B /year Internet Telco Enterprise PC/ Client/ server $5+B /year Mainframe / Mini 70s 80s 90s 2000s 2010s Source: insight from Top VCs including Walden

  8. Market Drivers Starting To Drive Roadmap Fabrics MPU 2006 PE(DSP) Memory AMS Consumer stationary Consumer Portable Medical Automotive Office Network Defense Markets

  9. Market Drivers As Value Adders Consumer stationary driver Interconnect A&P Product value Driver Driver Driver Driver Normalized performance Fabric Driver Fabric Fabric Design innovation Canonical block Technology scaling Canonical block Requirements & solutions Canonical block Canonical block 2016 2020 2018 2014 2008 2012 2006 2010 PIDS Modeling -- #DPEs, other -- Intrinsic switching speed -- Performance

  10. Driver Template

  11. System (Market) Drivers Working Table

  12. System (Market) Drivers Working Table

  13. Process For Each System Driver Industry data Synch with iNEMI market emulators 1 Select Critical/difficult parameters Select DRIVER requirements Identify market requirements 3 2 Cost Perf. Identify design requirements Create model Generate data Color data Identify key design parameters #units Size per unit Memory Pins Power Area Hrs. operation Power Market Drivers Table

  14. System Drivers Possible ITRS-iNEMI Engagement Model

  15. Generic features of “SOC Consumer Stationary” Contrast with “SOC Consumer Portable” Main Processor IO - Memory IF & Chip-to-Chip IF - Main Processor DPE DPE DPE DPE Main Memory PE PE PE DPE DPE DPE DPE PE PE PE Main Processor DPE DPE DPE DPE PE PE PE Peripherals PE PE PE Function A Function B Function C DPE DPE DPE DPE Function D Function E PE PE

  16. Design Trend: # of Processors & Processing Performance Max Processing Performance [TFLOPS]

  17. Design Trend: Power Consumption – SOC Total ★ SOC total power consumption rapidly increases 600W

  18. Channel A Networking Driver Transmitter core Receiver core High-bandwidth host chip High-bandwidth switch chip

  19. Very high bandwidth Key driver Large size Many high-speed I/Os Mixed signal Consume lots of power Key components I/O Switch fabric Possible control processor and memory CMOS technology Chip Structure I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O Switch Fabric Peripherals Processor Memory Memory I/O?

  20. Evolution of Key Parameters • Bandwidth driver • Combination of technology scaling and bandwidth standards • Assume I/Os dominate driver 8000 90 80 7000 Chip bandwidth 70 6000 Per-pin bandwidth 60 5000 50 Gbps Gbps 4000 40 3000 30 2000 20 1000 10 0 0 2006 2008 2010 2012 2014 2016 2018 2020

  21. Last year we created a Design Technology Roadmap System-level, logic/ckt/phy, DFT, Verification, DFM, General dependency: PIDS, yield, interconnect, A&P,… This year we’re creating a Systems Driver roadmap Consumer stationary, networking, auto Driver-specific dependency: PIDS, interconnect, A&P,… Added value = design technology + design innovation Design technology: general value add Design innovation: driver-specific value add Summary

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