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Accumulation Gate Capacitance of MOS Devices with Ultra-thin High-K Gate Dielectrics: Modeling and Characterization. Ahmad Ehteshamul Islam and Anisul Haque Dept. of EEE, BUET. Outline. Importance of Accumulation region modeling Modeling CV and Verification
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Accumulation Gate Capacitance of MOS Deviceswith Ultra-thin High-K Gate Dielectrics: Modeling and Characterization Ahmad Ehteshamul Islam and Anisul Haque Dept. of EEE, BUET
Outline • Importance of Accumulation region modeling • Modeling CV and Verification • Snapshot of the proposed characterization technique (EOT Extraction) • Origin of the proposed technique • Wave-function penetration (WP) effect • Comparison with other QMCV • Future work • Summary
CG Cox Cacc CG Cinv Cpoly Cox Cdep Importance of Accumulation region modeling • We can model both MOSCAP and MOSFET • Poly-Si effect on Capacitance is small • s(acc) < s(inv) for a particular carrier density • QM effect on CV is lower in accumulation (for same carrier) • As poly doping is high, this effect is further reduced • So, CG = Cox || CSem • There is no depletion capacitance • Helps in EOT extraction
Tdi = 42 Å (TEM Image) εdi = 14 Modeling CV and Verification • Self-consistent Schrödinger-Poisson Solution • Schrödinger Equation: Green’s function formalism with Transmission line analogy
Snapshot of the EOT Extraction Technique • Previous Techniques • Semi-classical technique (Sheet charge model) • McNutt and C. T. Sah, JAP 46, pp. 3909, 1975 • J. Maserjian et. al., SSE 17, pp. 335, 1974 • S. Kar, TED 50(10), pp. 2112, Oct. 2003 • QM Simulation • With or without (EOT underestimation) wave function penetration (WP) • Proposed Technique • Simple as Semi-classical techniques • Takes QM (including WP)
Origin of Proposed Technique Device Information: Wilk, Wallace, JAP 89(10), pp. 5243
Origin of Proposed Technique • Region 2 and 3 (QM) • Region 1 • Corrupted by Interface charge • Pretty small region • Region 3 • Varies from device to device Region 1: Semi-classical Ref.: R.F. Pierret Y. Tsividis
Equation to be used Region 1 Region 3 X-axis Intercept gives, Cox Origin of Proposed Technique • Processing in Region 2
Wave Function Penetration Effect • The technique is almost independent of barrier height S. Mudanai et. al., EDL 22(3), pp. 145, Mar. 2001. 1~2 A shift for 1nm Device
Effective mass: • Electron: 0.98, 0.19 • Hole: 0.5, 0.16 [Sze] 0.29, 0.2 [Takagi, TED 46(7)] WP Effect lower Wave Function Penetration Effect • Takes into account • WP Effect for electron is less than that for hole A. Haque et. al., TED 49(9), pp. 1580, Sep. 2002. • Compared our results with QM simlulator results: • J. J. Chambers et. al., JAP, 90(2), pp. 918 • Our extracted EOT • Matches with PMOS device (electron in accumulation) • Greater than referred value for NMOS (as EOT underestimated in reference, neglecting WP effect)
Extracted Cacc vs. Φs • Using Cdi, we can extract • Cacc • a
Comparison with QUASI (A. Ghetti) and UTQUANT • UTQUANT (Compact Model) • F. Li, et. al., TED 52(6), pp. 1148, June 2005. • Considers WP in High-K same as that in SiO2. • Neglects increased penetration in High-K • So this papers extraction of EOT (for High-K) < Our extraction • Whereas, extraction for SiO2 is almost identical QUASI
Summary • A new EOT extraction technique proposed • Simpler as the semi-classical techniques • Takes into account QM effects • Technique compared with different QMCV • Extracted Cacc- Φs shows expected behavior • Physical Origin of Cacc-Φs relationship (To be published)