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Explore error detection methods like Parity Check and CRC, error control, flow control, and high-level data link protocols. Learn about different error types and the importance of error detection in data transmission.
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COE 342: Data & Computer Communications (T042)Dr. Marwan Abu-Amara Chapter 7: Data Link Control Protocols
Lecture Contents • Error Detection (Parity Check, CRC) • Error Control • Stop-and-Wait ARQ • Go-Back-N ARQ • Selective-Reject ARQ • Flow Control • Stop-and-Wait flow control • Sliding-Window flow control • High-Level Data Link (HDLC) • Other Data Link Control Protocols COE 342 (T042) – Dr. Marwan Abu-Amara
What is Data Link Control • The logic or procedures used to convert the raw stream of bits provided by the physical layer into a “reliable” connection • Requirements and Objectives: • Frame synchronization • Error control • Flow control • Addressing • Multiplexing data and control on connection • Link management COE 342 (T042) – Dr. Marwan Abu-Amara
Types of Error • An error occurs when a bit is altered between transmission and reception (0 becomes 1 or 1 becomes 0) • Single bit errors • One bit altered • Adjacent bits not affected • Typically caused by white noise • Burst errors • Contiguous sequence of B bits in which first, last, and any number of intermediate bits are in error • Caused by impulse noise or fading (in wireless) • Effect is greater at higher data rates COE 342 (T042) – Dr. Marwan Abu-Amara
1 2 3 4 … … F-2 F-1 F 1 0 1 0 1 0 0 0 1 0 1 0 … 0 0 1 Prob [1st bit in error] = BER Prob [1st bit correct] = 1-BER Prob [2nd bit in error] = BER Prob [2nd bit correct] = 1-BER Prob [Fth bit in error] = BER Prob [Fth bit correct] = 1-BER Motivation for Error Detection • Without error detection & correction the number of undetected errors would be unacceptable • Hence, for a frame of F bits, Prob [frame is correct] = (1-BER)F • Prob [frame is erroneous] = 1 - (1-BER)F = Frame Error Rate (FER) COE 342 (T042) – Dr. Marwan Abu-Amara
Motivation for Error Detection (Example) • ISDN specifies a BER = 10-6 for a 64kbps channel • How many frames are transmitted in one day if the frame size is F = 1000 bits? • Number of frames/day = (64,000/1000) × 24 × 3600 • i.e. Number of frames/day = 5.5296 × 106 • What is the FER? • FER = 1 – (1 – BER)F = 1 – (0.999999)1000 = 10-3 • How many erroneous frames/day? • 5.5296 × 106 × 10-3 = 5.5296 × 103 • This is too high! We definitely need error detection & correction COE 342 (T042) – Dr. Marwan Abu-Amara
Error Detection Techniques • There are two main error detection techniques • Parity Check • Cyclic Redundancy Check (CRC) • Both techniques use additional bits that are added by transmitter for error detection as shown in the following figure COE 342 (T042) – Dr. Marwan Abu-Amara
Error Detection COE 342 (T042) – Dr. Marwan Abu-Amara
Parity Check • Simplest error-detection scheme • Appending one extra bit: • Even Parity: Will append “1” such that the total number of 1’s are even • Odd Parity: Will append “1” such that the total number of 1’s are odd • Example: If an even-parity is used, the Rx will check if the total number of 1’s is even • If it is not error occurred • Note that even number of bit errors goes undetected COE 342 (T042) – Dr. Marwan Abu-Amara
Cyclic Redundancy Check (CRC) • Burst errors are most likely not to be detected by a simple parity check scheme • Instead, a more elaborate technique called Cyclic Redundancy Check (CRC) is typically implemented • CRC appends redundant bits to the frame trailer called Frame Check Sequence (FCS) • FCS would later be utilized for error detection • In a given frame containing n bits, we define: • k = the number of original data bits • (n – k) = the number of bits in the FCS field • So that the total frame length is k + (n – k) = n bits COE 342 (T042) – Dr. Marwan Abu-Amara
CRC Error Detection Process • Given k-bit data (M), the TX generates an (n – k)-bit FCS field (F) such that the total n-bit frame (T) is exactly divisible by some predetermined number (P) • In general the received frame may or may not be equal to the sent frame • Let the received frame be (T’) • Obviously, in error-free transmission T’ = T • The RX then divides (T’) by the known divisor (P) and checks if there is any remainder • If division yields a remainder then the frame is erroneous • If the division yields no remainder then the frame is error-free unless many erroneous bits in T’ resulted in an exact division by P (This is very unlikely but possible: This is an undetected error!) COE 342 (T042) – Dr. Marwan Abu-Amara
CRC Generation • CRC generation is all about finding FCS given the data (M) and the divisor (P) • There are two main CRC generation methods: • Modulo-2 Arithmetic Method • Polynomial Method • The methods are in deed identical • The difference lies in the interpretation of what “Division” is COE 342 (T042) – Dr. Marwan Abu-Amara
CRC – Modulo-2 Arithmetic Method • Modulo-2 arithmetic (similar to XOR) is used to generate the FCS: • 0 0 = 0; 1 0 = 1; 0 1 = 1; 1 1 = 0 • 1 0 = 0; 0 1 = 0; 1 1 = 1 • FCS generation method (using previous rules): • Multiply: 2(n – k) M • Divide: 2(n – k) M / P • Use the (n – k)-bit remainder as the FCS • The way we generate T from M and FCS is equivalent to performing the following binary operation: • T = 2(n – k) M + F • Remember that the RX divides the received T (i.e. T’) by the known divisor (P) and checks if there is any remainder COE 342 (T042) – Dr. Marwan Abu-Amara
Modulo-2 Arithmetic Method Data M: COE 342 (T042) – Dr. Marwan Abu-Amara
Example – Modulo-2 Arith. Method • Given • M = 1 0 1 0 0 0 1 1 0 1 • P = 1 1 0 1 0 1 • Find the FCS field • Solution: • First we note that: • The size of M is k = 10 bits • The size of P is (n – k + 1) = 6 bits Hence the FCS length is n – k = 5 The size of the frame T is n = 15 bits COE 342 (T042) – Dr. Marwan Abu-Amara
Example – Modulo-2 Arith. Method • Solution (continued): • Multiply 2(n – k) M • 2(5) 1 0 1 0 0 0 1 1 0 1 = 1 0 1 0 0 0 1 1 0 1 0 0 0 0 0 • This is a simple shift to the left by five positions • Divide 2(n – k) M / P (see next slide for details) • 1 0 1 0 0 0 1 1 0 1 0 0 0 0 0 ÷ 1 1 0 1 0 1 yields: • Quotient Q = 1 1 0 1 0 1 0 1 1 0 • Remainder R = 0 1 1 1 0 • Use FCS = R = 0 1 1 1 0 and append it to M to get the full frame T • T = 1 0 1 0 0 0 1 1 0 1 0 1 1 1 0 M FCS COE 342 (T042) – Dr. Marwan Abu-Amara
Example – Modulo-2 Arith. Method # bits here < # bits of P, result of division (i.e. corresponding bit in Q) is 0 COE 342 (T042) – Dr. Marwan Abu-Amara
Cyclic Redundancy Check (CRC) • Animation for CRC Calculation COE 342 (T042) – Dr. Marwan Abu-Amara
Problem 6-12 • For P = 110011 & M = 11100011, find the CRC COE 342 (T042) – Dr. Marwan Abu-Amara
CRC – Polynomial Method • Consider the following k-bit word or frame (M) and its (k-1) polynomial equivalent M(x): bk-1 bk-2 … b2 b1 b0 bk-1xk-1 + bk-2xk-2 + … + b1x1 + b0 where bi (k-1 ≤ i ≤ 0) is either 1 or 0 • Example1: an 8 bit word M = 11011001 is represented as M(x) = x7+x6+x4+x3+1 COE 342 (T042) – Dr. Marwan Abu-Amara
CRC – Mapping Binary Bits into Polynomials • Example2: What is x4M(x) equal to? x4M(x) = x4(x7+x6+x4+x3+1) = x11+x10+x8+x7+x4, the equivalent bit pattern is 110110010000 (i.e. four zeros appended to the right of the original M pattern) • Example3: What is x4M(x) + (x3+x+1)? x4M(x) + (x3+x+1) = x11+x10+x8+x7+x4+ x3+x+1, the equivalent bit pattern is 110110011011 (i.e. pattern 1011 = x3+x+1 appended to the right of the original M pattern) COE 342 (T042) – Dr. Marwan Abu-Amara
T = (n+k)-bit frame F = n-bit FCS M = k-bit message P =(n+1) bit divisor CRC Calculation • T = (k+n)-bit frame to be Transmitted, n < k • M = k-bit message, the first k bits of frame T • F = n-bit FCS, the last n bits of frame T • P = pattern of n+1 bits (a predetermined divisor) • Note: • T(x) is the polynomial (of k+n-1st degree or less) representation of frame T • M(x) is the polynomial (of k-1st degree or less) representation of message M • F(x) is the polynomial (of n-1st degree or less) representation of FCS • P(x) is the polynomial (of nth degree or less) representation of the divisor P • T(x) = Xn M(x) + F(x) – refer to example 3 on previous slide COE 342 (T042) – Dr. Marwan Abu-Amara
CRC Calculation - Procedure • Shift pattern M(x), n bits to the left, i.e. multiply by 2nM(x) • Divide the new pattern 2nM(x) by the pattern P • The remainder of the division R (n bits) is set to be the FCS • The desired frame T is 2nM(x) + FCS bits COE 342 (T042) – Dr. Marwan Abu-Amara
Example of Polynomial Method • Given • M = 1 0 1 0 0 0 1 1 0 1 (k = 10) • P = 1 1 0 1 0 1 (n – k + 1 = 6) • Find the FCS field • Solution: • M(x) = x9 + x7 + x3 + x2 + 1 • P(x) = x5 + x4 + x2 + 1 • x5M(x)/P(x) = (x14 + x12 + x8 + x7 + x5)/(x5 + x4 + x2 + 1) • This yields a remainder R(x) = x3 + x2 + x (details on next slide) • i.e. R = 01110 • Recall that R must be n – k = 5-bit long COE 342 (T042) – Dr. Marwan Abu-Amara
Example of Polynomial Method COE 342 (T042) – Dr. Marwan Abu-Amara
Choice of P(x) • How should we choose the polynomial P(x) (or equivalently the divisor P)? • The answer depends on the types of errors that are likely to occur in our communication line • As seen before, an error E(x) will be undetectable only if it is divisible by P(x) • It could be shown that: • All single-bit errors are detectable if P(x) has two terms or more • All double-bit errors are detectable if P(x) has three terms or more • Any odd number of errors are detectable if P(x) contains the factor (x + 1) • Any burst error whose length is less than the FCS length (n – k) is detectable COE 342 (T042) – Dr. Marwan Abu-Amara
Choice of P(x) • In addition, if all error-patterns are equally likely then: • For a burst error of length (r + 1), the probability of undetected error is 21 – r • For a longer burst error i.e. length > (r + 1), the probability of undetected error is 2– r • There are four widely-used versions of P(x) • CRC-12: P(x) = x12 + x11 + x3 + x2 + x + 1 • CRC-16: P(x) = x16 + x15 + x2 + 1 • CRC-CCITT: P(x) = x16 + x12 + x5 + 1 • CRC-32: P(x) = x32 + x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 + x5 + x4 + x2 + x + 1 COE 342 (T042) – Dr. Marwan Abu-Amara
CRC Applications • CRC-8 and CRC-10 (not shown) are used in ATM • CRC-12 is used for transmission of 6-bit characters. Its FCS length is 12-bits • CRC-16 & CRC-CCITT are used for 8-bit characters in the US and Europe respectively • Used in HDLC • CRC-32 is used for IEEE802.3 LAN standard COE 342 (T042) – Dr. Marwan Abu-Amara
CRC – Receiver Procedure • TX sends frame T • Channel introduces error pattern E • RX receives frame Tr = TE (note that if E = 000..000, then Tr is equal to T, i.e. error free transmission) • Tr is divided by P, then the remainder of the division is R • if R is ZERO’s, RX assumes no errors in frame, else RX assumes erroneous frame • If an error occurs and Tr is still divisible by P UNDETECTABLE error (this means the E is also divisible by P) COE 342 (T042) – Dr. Marwan Abu-Amara
CRC Circuit COE 342 (T042) – Dr. Marwan Abu-Amara
CRC Circuit Shift register circuit for dividing by P = X5+X4+X2+1 Note: A1=0, A2=1, A3=0, A4=1 and A5=1. COE 342 (T042) – Dr. Marwan Abu-Amara
Problem 6-13 • A CRC is constructed to generate a 4-bit FCS for an 11-bit message. The generator polynomial is X4+X3+1 • Draw the shift register circuit that would perform this task (see figure 6.6) • Encode the data bit sequence 10011011100 (leftmost bit is the LSB) using the generator polynomial and give the code word • Now assume that bit 7 (counting from the LSB) in the code word is in error and show that the detection algorithm detects the error COE 342 (T042) – Dr. Marwan Abu-Amara
Problem 6-13 – Solution Input data C1 C0 C3 C2 a) b) Data = 1 0 0 1 1 0 1 1 1 0 0 M(X) = 1 + X3 + X4 + X6 + X7 + X8 X4M(X) = X12 + X11 + X10 + X8 + X7 + X4 T(X) = X4M(X) + R(X) = X12 + X11 + X10 + X8 + X7 + X4 + X2 Code = 0 0 1 0 1 0 0 1 1 0 1 1 1 0 0 c) Code = 0 0 1 0 1 0 0 0 1 0 1 1 1 0 0 yields a nonzero remainder error is detected COE 342 (T042) – Dr. Marwan Abu-Amara
Error Correction • The following question is orderly: • What action should be taken when an error is detected (e.g. by using CRC)? • I found an error, now what? • There are two alternatives: • RX asks for a retransmission of the erroneous frame • This is method is adopted by data-link protocols such as HDLC and transport protocol such as TCP • It is a Backward Error Correction (BEC) method • RX attempts to correct the errors if enough redundancy exists in the received data • In this method, the TX uses Block Coding to introduce the needed redundancy so that the RX can correct potential errors • It is a Forward Error Correction (FEC) method COE 342 (T042) – Dr. Marwan Abu-Amara
Error Correction vs. Error Control • Using error correction by retransmission is not adequate in the following cases: • Error rate is high (e.g. wireless communication) • Will result in too many retransmission which leads to network overloading • Transmission distance is long (e.g. satellite, submarine optical fiber cables) • Network becomes very inefficient • We will call Error Correction methods those that use FEC techniques and Error Control methods those that use retransmission COE 342 (T042) – Dr. Marwan Abu-Amara
Error Correction Process • TX maps each k-bit data block into n-bit codeword using an FEC encoder • For redundancy, n > k • RX passes the received codeword through an FEC decoder • With no errors, FEC decoder produces the original k-bit data • For certain errors, FEC decoder detects the error, corrects it and produces the original k-bit data • For other errors, FEC decoder detects the error, but cannot correct it • Rarely, does decoder not detect the error COE 342 (T042) – Dr. Marwan Abu-Amara
Block Code as Error Correction Code • Error correction coding theory is complex and lies beyond the scope of our course • However, we will use an example to illustrate how a special type of error correction codes (called Block Codes) works • First, recall that the Hamming distance between two binary numbers is the number of bit positions in which they differ • E.g. Hamming distance d(0 1 1 0 , 0 0 1 1) = 2 COE 342 (T042) – Dr. Marwan Abu-Amara
Block Code Example • Suppose we code the following data blocks as: • 0 0 0 0 0 0 0 0 (codeword w1) • 0 1 0 0 0 1 1 1 (codeword w2) • 1 0 1 1 1 0 0 0 (codeword w3) • 1 1 1 1 1 1 1 1 (codeword w4) • Suppose we receive pattern: w’ = 0 0 1 1 1 1 • This is not a valid codeword • RX will detect an error because it knows its codebook • Can it correct the error? COE 342 (T042) – Dr. Marwan Abu-Amara
Block Code Example • RX attempts to find the closest valid codeword to w’ • The minimum hamming distance is between w’ and w2 • d(w’,w2) = 1 • RX can deduce that the most likely codeword sent is w2 • What if we had more than one valid codeword each with minimum hamming distance to w’? • In deed, we have 26 = 64 possible codes with 4 valid ones only. So this is likely to happen. • Example: • w’ = 1 0 1 0 1 0 • d(w’,w1) = d(w’,w4) = 3 • In this case the Block Code scheme cannot correct the error COE 342 (T042) – Dr. Marwan Abu-Amara
Correction Power of Block Codes • Let: • Number of possible codes is 2n • Number of valid codes is 2k • Minimum distance between two distinct valid codes is dmin • It can be shown that, for t integer: • If dmin 2t + 1 then the block code can correct all errors t bits • If dmin is only dmin 2t then the block code can correct all errors t – 1 bits and can detect all errors t, but cannot correct them, in general. • In other words, the maximum guaranteed correctable errors are: • t = (dmin– 1)/2 • The detectable errors are: • t = dmin– 1 COE 342 (T042) – Dr. Marwan Abu-Amara
Example • Find the correction power of the following code: • 0 0 0 0 0 0 0 0 0 0 0 0 • 0 1 1 0 1 0 1 0 1 0 1 0 • 1 0 0 1 0 1 0 1 0 1 0 1 • 1 1 1 1 1 1 1 1 1 1 1 1 • Solution: • The minimum distance is dmin= 5 • t = (dmin– 1)/2 = 2 • This code is capable of correcting all single errors and all two-bit errors COE 342 (T042) – Dr. Marwan Abu-Amara
Coding Gain • An error-correcting code is said to have a gain because for a given BER performance, using coding would require less (Eb/N0) than without coding • The coding gain for a target BER, usually expressed in dB, is the difference: • (Eb/N0)(without coding) – (Eb/N0)(with coding) • For any scheme FEC we need to note the following: • To achieve a gain, a minimum (Eb/N0) is required • Below this minimum value the coding actually deteriorates the BER performance (see next slide) • In other words, FEC works well until (Eb/N0) falls below a certain threshold beyond which FEC becomes totally inefficient COE 342 (T042) – Dr. Marwan Abu-Amara
Coding Gain Illustration No Gain Region Gain Region This code has 3dB gain at BER = 10-6 Below (Eb/N0) 5.5 dB coding deteriorates BER COE 342 (T042) – Dr. Marwan Abu-Amara
Error & Flow Control • We now study two main functions of the data-link layer • Error and Flow control • Why Error & Flow Control together? • We usually lump Error Control and Flow Control discussions together because the data-link protocols used for error control are also used for flow control COE 342 (T042) – Dr. Marwan Abu-Amara
Error Control Definition • Error Control is the second type of methods used to “handle” errors in frames • First type was FEC (studied earlier) • Error Control methods are those that use retransmission in the case an error occurs in a frame • This process is called Automatic Repeat Request (ARQ) • In general, a retransmission is needed if a: • Frame is erroneous (e.g. coding is not capable of correcting it) • Frame is lost i.e. does not arrive or arrives too late • There are several reasons for this to happen e.g. existence of noise, network congestion… COE 342 (T042) – Dr. Marwan Abu-Amara
Flow Control Definition • We define Flow Control as: “The set of procedures used to restrict the amount of data that a TX can send before waiting for an acknowledgement from the RX” (per Forouzan) • This is to avoid overwhelming the RX by the flow of data from TX COE 342 (T042) – Dr. Marwan Abu-Amara
Error & Flow Control Protocols • There are three main types of error control protocols (ARQ-based): • Stop-and-Wait ARQ • Sliding Window ARQ • Go-back-N ARQ • Selective-Reject ARQ • There are two main types of flow control protocols: • Stop-and-Wait • Sliding Window COE 342 (T042) – Dr. Marwan Abu-Amara
Categories of Error Control COE 342 (T042) – Dr. Marwan Abu-Amara
Categories of Flow Control COE 342 (T042) – Dr. Marwan Abu-Amara
Stop-and-Wait ARQ • Stop-and-Wait ARQ is a simple protocol: • TX keeps a copy of the last frame sent • After receiving the frame, RX sends back an ACK • After receiving this ACK, TX sends another frame and so on… • Both Data & ACK frames are alternately numbered with “0” or “1” • Data Frame “0” is acknowledged by ACK “1” • Data Frame “1” is acknowledged by ACK “0” COE 342 (T042) – Dr. Marwan Abu-Amara