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The Analysis of Cyclic Circuits with Boolean Satisfiability

The Analysis of Cyclic Circuits with Boolean Satisfiability. inputs. outputs. combinational logic. Combinational Circuits. The current outputs depend only on the current inputs. Circuits with Cycles. 0. 0. x. AND. a. OR. =. +. +. +. 0. 0. f. b. (. a. x. (. d. c. (.

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The Analysis of Cyclic Circuits with Boolean Satisfiability

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  1. The Analysis of Cyclic Circuits with Boolean Satisfiability

  2. inputs outputs combinational logic Combinational Circuits The current outputsdepend only on the current inputs.

  3. Circuits with Cycles 0 0 x AND a OR = + + + 0 0 f b ( a x ( d c ( x f ))) 1 1 b AND 0 x OR c AND d OR

  4. Circuits with Cycles 1 x AND a OR = + + + 1 1 f b ( a x ( d c ( x f ))) 1 1 b AND 1 1 x OR c AND d OR

  5. Circuits with Cycles Circuit is cyclic yet combinational; computes functions f1 and f2 with 6 gates. 1 x AND An acyclic circuit computing these functions requires 8 gates. a OR = + + f b ( a x ( d c )) 1 b AND 1 1 x OR c AND = + + f d c ( x b a ) 2 d OR

  6. all wires are assumed to have unknown/undefined values ( ). • the primary inputs assume definite values in {0, 1}. Circuit Model Perform static analysis in the “floating-mode”. At the outset: a “controlling” input full set of“non-controlling” inputs unknown/undefinedoutput

  7. all wires are assumed to have unknown/undefined values ( ). • the primary inputs assume definite values in {0, 1}. ^ ^ ^ ^ ^ 1 AND OR Circuit Model Perform static analysis in the “floating-mode”. At the outset: During the analysis, only signals driven(directly or indirectly)by the primary inputs are assigned definite values.

  8. Exhaustive Analysis • Assign values to every wire • Step through all primary inputs values • Propagate all values 0 0 1 x AND a OR b AND 1 0 1 x OR c AND d OR

  9. Why use Boolean Satisfiability? • BDD-based analysis is slow for large problem sizes • SAT-based methods are known to be a good solution for large problem sizes in practice

  10. SAT Based Analysis of Cyclic Circuits • Find feedback arc set • Introduce dummy variables • Encode the circuit computation for ternary-valued logic (0, 1, ) • SAT Question: Is there any input assignment that produces values somewhere in the circuit? ┴ ┴

  11. Feedback and Dummy Variables

  12. Ternary Logic Conversion Binary AND Ternary AND Encoding Scheme

  13. The SAT Question “For any input assignment (where all dummy variables are assigned their correct values) does a value persist?” ┴

  14. The Final SAT Instance

  15. Further Work • Analysis • Better feedback arc algorithm • Try different encoding schemes • Synthesis • Implement new version of CYCLIFY with ABC

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