Computer Organization

1. Computer Organization Course Web Site http://www.engr.uconn.edu/~ibrahim/hardware 445_01

2. Textbooks • Computer Organization, 5th ed. • Carl Hamacher, Zvonko Vranesic, SafwatZaky 445_01

3. Processor I/O Computer Functional Units Input Arithmetic& Logic Memory Output Control 445_01

4. Course Organization • Computer Structure (Ch 1) • Instruction Sets & Addressing Modes (Ch 2) • Control Unit Design (Ch 7) • Computer Arithmetic (Ch 6) • Memory (Ch 5) • Input/Output (Ch 4) • Pipelining (Ch 8) • Embedded Systems (Ch 9) 445_01

5. Computer Information (Binary) • (Machine) Instructions • (Machine Language) Programs • Data • 2's complement • BCD • ASCII 445_01

6. Output Display Printer Speakers Input Keyboard Mouse Microphone Camera Scanner I/O • Serial Communications • Network • Modem 445_01

7. Primary Random Access Memory (RAM) Read Only Memory (ROM) Organization Word Address Read/Write Secondary Magnetic Disks Tape Optical Disks Hierarchy Cache Main Virtual Memory 445_01

8. Arithmetic Addition Subtraction Multiplication Division Comparison Logic AND OR NOT XOR ALU • Registers • Store • Shift 445_01

9. Control Unit • Coordinates/Directs other Units • Computer Operation • Input • Program/Data stored in Memory • Processing • Information fetched into Registers • Processed by ALU • Output 445_01

10. History • First Generation (miliseconds) • von Neumann (stored program) • Vacuum Tubes • Magnetic Core Memory • Teletypes/Magnetic Tapes • Second Generation (microseconds) • Transistor • High-level Languages (Fortran) • Compilers • I/O Processors 445_01

11. History • Third Generation • Integrated Circuits • Microprogramming • Parallelism/Pipelining • Operating Systems (sharing) • Cache/VM • Fourth Generation (nanoseconds) • VLSI (Single Chip Microprocessor) • Personal Computers • Networks 445_01

12. Processor I/O Computer Functional Units Input Arithmetic& Logic Memory Output Control 445_01

13. Control Unit Arithmetic Logic Unit MAR - Memory Address Register MDR - Memory Data Register PC - Program Counter IR - Instruction Register 445_01

14. Assembly Language MOVE NUM1,R1 MOVE #1,R2 ADD #1,R1 ADD R1,R2 Register Transfer Notation R1  [NUM1] R2  1 R1  1 + [R1] R2  [R1] + [R2] Computer Instructions 445_01

15. The “fetch-execute cycle” • Fetch the instruction whose address is in the program counter • Increment the PC so it holds the address of the next instruction • Execute the instruction just fetched • Fetch the next instruction • Etc. 445_01

16. Arithmetic/Logic Unit Control Unit Instruction Register Data Register instruction fetch Program Counter Data Register instruction Memory 445_01

17. Instruction Fetch CPU PC IR Memory MAR MDR Memory Control instruction address Bus instruction 445_01

18. Arithmetic/Logic Unit Control Unit instruction execute Instruction Register Data Register Program Counter Data Register data Memory data 445_01

19. Instruction Execution CPU IR R1 Memory MAR MDR Memory Control operand (data) address Bus data 445_01

20. Fetch MAR  [PC] PC  [PC] + 1 MDR  [MEM([MAR])] IR  [MDR] Execute MAR  NUM1 MDR  [MEM([MAR])] R1  [MDR] Example Instruction MOVE NUM1,R1 445_01

21. Fetch MAR  [PC] PC  [PC] + 1 MDR  [MEM([MAR])] IR  [MDR] Execute R1  1 + [R1] Another Example ADD #1,R1 445_01

22. Single-Bus Structure Input Output Memory Processor 445_01

23. System Software • Compiler • High-level Language  Machine Language • Assembler • Assembly Language  Machine Language • Text Editor • Keyboard Input  File • Operating System • Control Sharing & Interaction • Assign & Manage Resources • Memory • Disk Space • Handle I/O 445_01

24. Memory Performance Main Memory Processor Cache Memory 445_01

25. Period (P) Rate (R) R = 1/P 1 GHz = 1/1ns Processor Clock CLK 445_01

26. Performance Equation • Processor Execution Time (T) • Number of Machine Language Instructions (N) • Average Steps per Machine Instruction (S) • Clock Rate (R) • MIPS: Millions of instructions per second • Megaflops: Millions of floating point operations per second • Megahertz: Millions of clock cycles per second 445_01

27. I1 I2 I3 F1 E1 F2 E2 F3 E3 Sequential Execution I1 F1 E1 I2 F2 E2 I3 F3 E3 Pipelined Execution Pipelining 445_01

28. Parallel Processing • Parallel Execution • Superscalar • Multiprocessors • Shared-Memory • Multicomputers • Message-Passing 445_01

29. Multiprogramming Multiprocessing, multitasking. A system that provides for concurrent execution of multiple programs, i.e., manages multiple processes Programs share use of the processor (take turns). 445_01

30. Multiprogramming Multiprocessing: 1) Multiprogramming 2) Parallel processing (multiple processors) depending on context Multitasking: • 1) Multiprogramming • 2) A particular form of multiprogramming depending on context 445_01

31. Printer Disk OS routines Program t t t t t t 1 2 3 4 5 0 Time Figure 1.4. User program and OS routine sharing of the processor. Figure 1.4. User program and OS routine sharing of the processor. 445_01

32. CISC vs RISC • Complex Instruction Set Computers (CISC) • Smaller N • Larger S • Reduced Instruction Set Computers (RISC) • Larger N • Smaller S • Easier to Pipeline 445_01