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Segment Parser for 160MHz

Segment Parser for 160MHz. Date: 2010-11-08. Authors:. Abstract. This presentation proposes supplementation of 160MHz segment parser in the 11ac spec framework (11-0992r15). Current Segment Parser for 160MHz. Option 2 in [1] is suggested as interleaver and segment parser scheme for 160MHz

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Segment Parser for 160MHz

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  1. Segment Parser for 160MHz Date: 2010-11-08 Authors:

  2. Abstract This presentation proposes supplementation of 160MHz segment parser in the 11ac spec framework (11-0992r15).

  3. Current Segment Parser for 160MHz • Option 2 in [1] is suggested as interleaver and segment parser scheme for 160MHz • Code across 160MHz and interleave per 80MHz • It has reasonable tradeoff between performance and complexity

  4. Current Segment Parser for 160MHz • Current text which has passed TGac motion [1] • 3.2.4.3.X Segment parser • In case of contiguous and noncontiguous 160 MHz transmissions, even output bits of the stream parser are allocated to the lower 80 MHz and odd output bits to the upper 80 MHz for each stream. First output bit from the stream parser in each symbol is an even bit. • 3.2.4.3.2 Frequency interleaver • For contiguous and noncontiguous 160 MHz transmissions using BCC encoding, the lower and upper 80 MHz portions are each interleaved using the interleaver defined for 80 MHz transmissions.

  5. Need to Supplement to Current Scheme • Current scheme is just to alternate between odd input and even input regardless of constellation size • This may result in potential problem in 2nd stage of frequency interleaver • 2nd stage of frequency interleave : map adjacent coded bits on different positions which has different reliability among constellation • Current scheme may limit this interleaving function in some cases by mapping consecutive coded bits on locations which have the same reliability among constellation

  6. One of Examples [80MHz Case]

  7. One of Examples [80MHz Case] (2) • Every 3 bit bundle is assigned to spatial stream in a round-robin way • because number of bits for real or imaginary part of constellation is 3 bits in 64QAM • Interleaver input bits are filled in 26 columns in order • 3j, 3j+1, 3j+2th rows in 3ith column to be mapped on constellation itself • 3j, 3j+1, 3j+2th rows in 3i+1th column to be mapped on constellation by cyclic shift whose size is 1 • 3j, 3j+1, 3j+2th rows in 3i+2th column to be mapped on constellation by cyclic shift whose size is 2 • In 20/40/80MHz cases, there is no problem

  8. One of Examples [160MHz Case] • But, with current 160MHz segment parser (just alternate between even and odd bits), there are some cases where consecutive coded bits are located on particular positions which has the same level of reliability among constellation • This means that 2nd stage of frequency interleaver cannot function effectively • This does not match consistency of interleaver which has been applied until 20/40/80MHz design • May also degrade the system performance due to limitation on interleaver functions

  9. One of Examples [160MHz Case] (2)

  10. 160MHz Segment Parser Supplementation • Supplementation Method • Stream parser output is parsed into the two 80 MHz portions in blocks of s·Nes bits • s = number of bits in real/imaginary axis of constellation

  11. 160MHz Segment Parser Supplementation (2) • What if Ncbpss (number of coded bits) is not divisible by 2s·Nes? • Only happens in the same 4 MCSs which needs additional rule for 160MHz stream parsing [2] • 64QAM, Rate 2/3, 5 streams—NES=5 • 64QAM, Rate 2/3, 7 streams—NES=7 • 64QAM, Rate 3/4, 5 streams—NES=5 • 64QAM, Rate 3/4, 7 streams—NES=7 • Even in these cases, remaining number of coded bits is divisible by 2s • Proposed parsing scheme when Ncbpss is not divisible by 2s·Nes • Proceed with method on slide 10 for the first floor(Ncbpss / (2s·Nes) ) bits • Remaining bits are parsed into the two 80 MHz portions in blocks of s bits • Same method as in dealing with corner cases in 160MHz stream parser [2]

  12. 160MHz Segment Parser Supplementation (3)

  13. Conclusions • Proposed supplementation of 160MHz segment parser as described on slide 10 • Preserves the intended role of the 2nd stage frequency interleaver • Prevent consecutive bits in same reliability bit positions • Preserves the basic concept of alternative bits to two 80 MHz portion • Now in blocks of s·Nes bits • Identified and proposed scheme to deal with cases when Ncbpss is not divisible by 2s·Nes • Proposed remedy similar to the solution for stream parsing [2] • Simulation results provided in following slides to validate performance

  14. Simulations (Setup) • Coding : BCC • MIMO receiver : ML • Phase noise : -41 dBc • PA model : Not used • Contiguous 160 MHz simulated

  15. Simulations (Comparison) • Nseg = 1 • One large interleaver across 160 MHz • Ncol = 39 • Option 1 in [1] • Nseg = 2, parser = 0 • Interleaver per 80 MHz • Simple bit-by-bit segment parsing • Currently adopted scheme in TGac • Nseg = 2, parser = 1 • Interleaver per 80 MHz • Segment parsing using the proposed method in this submission

  16. Simulations (3x3, Nss=3, 16-QAM ½)

  17. Simulations (3x3, Nss=3, 16-QAM ¾)

  18. Simulations (3x3, Nss=3, 256-QAM ¾)

  19. Simulations (Summary) • Simulation results are provided to validate the performance of the modified segment parser • The proposed segment parser provides additional performance gain in many cases • Did not find any case where the proposed segment parser performs inferior to the current segment parser • See additional results in appendix

  20. Proposed Change in 11ac Spec. Framework

  21. Pre-Motion • Do you support to accept supplementation of 160MHz segment parser (as described in slides 10-12) and modify the IEEE Specification Framework for TGac as shown on slide 20? • Yes • No • Abs

  22. References • [1] 11-10-1063-01-00ac-160mhz-transmission-flow • [2] 11-10-1264-00-00ac-160MHz-Stream-Parser

  23. Appendix A:11ac Frequency Interleaver

  24. 1st Stage of Frequency Interleaver • Write by columns & read by rows

  25. 2nd Stage of Frequency Interleaver • Shuffling reliability among constellation

  26. 3rd Stage of Frequency Interleaver • Frequency rotation • Cyclic shift on frequency with the use of different offset to each spatial streams when multiple streams to prevent adjacent coded bits being mapped to the same sub-carrier for different antennas • Fixed Nrot for Nss=1,2,3,4 • TBD Nrot for Nss=5,6,7,8 • Nrot may be different for different antenna size

  27. Appendix B:More Simulation Results

  28. 1x1, Nss=1, BPSK 1/2

  29. 1x1, Nss=1, QPSK 1/2

  30. 1x1, Nss=1, QPSK 3/4

  31. 1x1, Nss=1, 16-QAM 1/2

  32. 1x1, Nss=1, 16-QAM 3/4

  33. 1x1, Nss=1, 64-QAM 2/3

  34. 1x1, Nss=1, 64-QAM 3/4

  35. 1x1, Nss=1, 64-QAM 5/6

  36. 1x1, Nss=1, 256-QAM 3/4

  37. 1x1, Nss=1, 256-QAM 5/6

  38. 3x3, Nss=3, 64-QAM 2/3

  39. 3x3, Nss=3, 64-QAM 3/4

  40. 3x3, Nss=3, 64-QAM 5/6

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