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ECE 645: Lecture 2. Number Representation Part 2 Fixed-Radix Signed Representations Floating Point Representations Little-Endian vs. Big-Endian Representations Galois Field Representations. Required Reading. Behrooz Parhami, Computer Arithmetic: Algorithms and Hardware Design.
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ECE 645: Lecture 2 Number Representation Part 2 Fixed-Radix Signed Representations Floating Point Representations Little-Endian vs. Big-Endian Representations Galois Field Representations
Required Reading Behrooz Parhami, Computer Arithmetic: Algorithms and Hardware Design Chapter 2, Representing Signed Numbers, Chapter 17, Floating-Point Representations J-P. Deschamps, G. Bioul, G. Sutter, Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems, Chapter 3.2, Integers Chapter 3.3, Real Numbers
Recommended Reading (to be covered at the next lecture) Behrooz Parhami, Computer Arithmetic: Algorithms and Hardware Design Chapter 5, Basic Addition and Counting J-P. Deschamps, G. Bioul, G. Sutter, Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems, Chapter 4.1.1 Basic Algorithm Chapter 11.1 Basic AdderChapter 11.2 Carry-Chain Adder
Representations of signed numbers Biased Signed-magnitude Complement Diminished-radix complement (Digit complement) Radix-complement r=2 r=2 Two’s complement One’s complement
Signed- magnitude Two’s complement One’s complement Biased 7 0111 1111 0111 0111 6 0110 1110 0110 0110 5 0101 1101 0101 0101 4 0100 1100 0100 0100 3 0011 1011 0011 0011 2 0010 1010 0010 0010 1 0001 1001 0001 0001 0 0000 1000 0000 0000 -0 1000 1111 -1 1001 0111 1111 1110 -2 1010 0110 1110 1101 -3 1011 0101 1101 1100 -4 1100 0100 1100 1011 -5 1101 0011 1011 1010 -6 1110 0010 1010 1001 -7 1111 0001 1001 1000 -8 0000 1000
Signed-magnitude representation of signed numbers k-1 k-2 0 magnitude sign Advantages: • conceptual simplicity • symmetric range: -(2k-1-1) .. -(2k-1-1) • simple negation Disadvantages: • addition of numbers with the same sign and with • a different sign handled differently
Biased (excess-B) representation of signed integers R(X) = X + B B = 2k-1, k=4 -2k-1≤ X ≤ 2k-1-1 -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 34 5 6 7 X R R(X) 0 1 2 34 5 6 7 8 9 10 11 12 13 14 15
Biased representation with radix 2 Signed number X Representation mapping Unsigned Representation R(X) Binary mapping Bit vector (xk-1xk-2...x0.x-1...x-l)
Complement Signed Number Representations
Complement representations with radix 2 Signed number X Representation mapping Unsigned Representation R(X) Binary mapping Bit vector (xk-1xk-2...x0.x-1...x-l)
Useful dependencies 1 – xi = xi X when X 0 - X when X < 0 xi xi 1 – xi |X| = 0 1 1 0 1 0
One’s complement transformation For 0 def OC(A) = A = 2k – 2-l - A Properties: k-1 k-2 ... 0 -1 -2 ... -l 1 1 ... 1 . 1 1 ... 1 0 OC(A) 2k – 2-l OC(OC(A)) = A – Ak-1 Ak-2… A0. A-1 A-2 ... A-l Ak-1 Ak-2… A0. A-1 A-2 ... A-l
One’s Complement Representation of Signed Numbers For –(2k-1 – 2-l) X 2k-1 – 2-l X for X > 0 0 or OC(0) for X = 0 OC(|X|) for X < 0 def R(X) = 0 R(X) 2k – 2-l
One’s complement representation of signed integers X<0 X>0 0 k=4 0, 2k-1 X X+2k-1 = 2k-1 - |X| -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 34 5 6 7 0 1 2 34 5 6 7 8 9 10 11 12 13 14 15
Two’s complement transformation (1) For 0 A + 2-l = 2k – A for A > 0 def TC(A) = 0 for A = 0 Properties: 2k – A = 2k – A – 2-l + 2-l = = (2k – 2-l – A)+2-l = A + 2-l 0 TC(A) 2k – 2-l TC(TC(A)) = A
A + 2-l mod 2k = 2k – A mod 2k Two’s complement transformation (2) For 0 def TC(A) =
Two’s Complement Representation of Signed Numbers For –2k-1 X 2k-1 – 2-l X for X 0 TC(|X|) for X < 0 def R(X) = 0 R(X) 2k – 2-l
Two’s complement representation of signed integers X<0 X>0 0 k=4 X 0 X+2k = 2k - |X| -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 34 5 6 7 0 1 2 34 5 6 7 8 9 10 11 12 13 14 15
Signed-magnitude representation of signed numbers X>0 0 X<0 k=4 0, 2k-1 X | X|+2k-1 = -X+2k-1 -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 34 5 6 7 0 1 2 34 5 6 7 8 9 10 11 12 13 14 15
Biased representation of signed numbers X>0 0 X<0 B = 2k-1, k=4 X+B B X+B -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 34 5 6 7 0 1 2 34 5 6 7 8 9 10 11 12 13 14 15
Arithmetic Operations in Signed Number Representations
Unsigned addition vs. signed addition Programmer Machine Unsigned mind Signed mind weight 128 64 32 16 8 4 2 1 carry 1 1 1 X Y S 0 0 0 1 0 0 1 1 1 0 0 0 0 1 0 1 1 0 0 1 1 0 0 0 + = x3 y3 x2 y2 x6 y6 x5 y5 x1 y1 x7 y7 x4 y4 x0 y0 FA FA FA FA FA FA FA FA c4 c3 c7 c6 c2 c8 c5 c1 s3 s2 s6 s5 s1 s7 s4 s0
Out of range flags Carry flag - C out-of-range for unsigned numbers C = 1 if result > MAX_UNSIGNED or result < 0 0 otherwise where MAX_UNSIGNED = 28-1 for 8-bit operands 216-1 for 16-bit operands Overflow flag - V out-of-range for signed numbers V = 1 if result > MAX_SIGNED or result < MIN_SIGNED 0 otherwise where MAX_SIGNED = 27-1 for 8-bit operands 215-1 for 16-bit operands MIN_SIGNED = -27 for 8-bit operands -215 for 16-bit operands
Overflow for signed numbers Indication of overflow Negative + Negative = Positive Positive + Positive = Negative Formulas Overflow2’s complement = xk-1 yk-1 sk-1 + xk-1 yk-1 sk-1 = = ck ck-1
Addition and subtraction Two’s complement Numbers of the same sign Numbers of the opposite sign -16 8 4 2 1 -16 8 4 2 1 1 1 0 1 1 -5 1 0 1 1 0 -10 0 0 1 0 1 5 1 0 1 1 0 -10 1 1 0 0 0 1 -15 1 1 0 1 1 -5 carry but not overflow -16 8 4 2 1 -16 8 4 2 1 0 1 0 1 0 10 1 1 0 1 1 -5 0 0 1 1 1 7 0 1 0 1 0 10 1 0 0 1 0 1 5 1 0 0 0 1 -15 carry but not overflow no carry but overflow
Two's Complement Adder/Subtractor Architecture Can replace thiswith k xor gates
Arithmetic Shift Two’s complement Sh.L {001012 = +5} = 010102 = +10 Sh.L {110112 = -5} = 101102 = -10 Sh.L {010102 = +10} = 101002 = - 12 Shift left may cause overflow overflow Sh.R {001012 = +5} = 000102 = +2 rem 1 Sh.R {110112 = -5} = 111012 = -3 rem 1 Shift right requires sign extension
Addition and subtraction One’s complement Numbers of the same sign Numbers of the opposite sign -15 8 4 2 1 -15 8 4 2 1 0 1 0 1 0 10 1 1 0 1 0 -5 1 1 0 1 0 -5 1 0 1 0 1 -10 1 0 0 1 0 0 1 0 1 1 1 1 1 + 1 + 5 0 0 1 0 1 -15 1 0 0 0 0 Disadvantage: Need another adder after the addition is complete! end-arround carry
Arithmetic Shift One’s complement Sh.L {001012 = +5} = 010102 = +10 Sh.L {110102 = -5} = 101012 = -10 Sh.L {010102 = +10} = 101002 = - 11 Shift left may cause overflow overflow Sh.R {001012 = +5} = 000102 = +2 rem 1 Sh.R {110112 = -5} = 111012 = -2 rem -1 Shift right requires sign extension
Addition and subtraction Signed-magnitude Numbers of the same sign Numbers of the opposite sign sign bit magnitude sign bit magnitude 0 1 0 1 1 11 0 0 1 1 0 6 1 1 0 1 1 -11 0 0 1 1 0 6 + + 17 0 1 0 0 0 1 11 > 6 1 0 1 1 11 0 1 1 0 6 carry = overflow – 0 1 0 1 1 5
Signed Number Representations Summary
Representing k-bit signed binary numbers Representation for X>0 Representation for 0 Representation for X<0 Representation 0, 2k-1 Signed- magnitude 2k-1+|X| X Biased B X+B X+B typical B=2k-1 or 2k-1-ulp Complement X 0, M mod 2k M-|X|=M+X Two’s complement 0 X 2k-|X|= One’s complement 2k-ulp-|X|= 0, 2k-ulp X
Value of a number in the signed representations Value of (xk-1xk-2 … x1x0.x-1 … x-l) Representation Signed- magnitude Biased Two’s complement One’s complement
Extending the number of bits of a signed number xk-1xk-2 … x1x0 . x-1x-2 … x-l X yk’-1yk’-2 … ykyk-1yk-2 … y1y0 . y-1y-2 … y-l y-(l+1) … y-l’ Y signed-magnitude xk-1 0 0 0 0 0 0 0 xk-2 … x1x0 . x-1x-2 … x-l 0 0 0 0 0 0 two’s complement xk-1 xk-1 xk-1 . . .xk-1xk-2 … x1x0 . x-1x-2 … x-l 0 0 0 0 0 0 one’s complement xk-1 xk-1 xk-1 . . .xk-1xk-2 … x1x0 . x-1x-2 … x-l xk-1 .. . .xk-1 biased . . . xk-2 … x1x0 . x-1x-2 … x-l 0 0 0 0 0 0 xk-1
Generalized complement representation of signed integers
Generalized complement representation of signed integers