EEL4930/5934 Reconfigurable Computing

1. EEL4930/5934 Reconfigurable Computing The state-of-the-art Reconfigurable Computing equipment available for this course is made possible by a generous grant from the Rockwell Collins Growth Relationship Grant Program and an equipment/software donation from Nallatech.

2. Instructors • Dr. Greg Stitt • gstitt@ece.ufl.edu • http://www.gstitt.ece.ufl.edu • Office Hours 3-4 M,W (Benton 323) • Also, by appointment • Dr. Herman Lam • hlam@ufl.edu • http://www.hlam.ece.ufl.edu • Larsen 225

3. Course Website • 2 sites • http://www.gstitt.ece.ufl.edu/courses/eel4930_5934/ • Linked off my website • WebCT Vista/E-learning • http://lss.at.ufl.edu/ • Select e-learning • Login with GatorLink account • Used for posting grades, class discussions • Email Policy • When sending an email, include the class name in brackets • e.g. [EEL5932] Question about project 2 • For emails to entire class, use e-learning • Announcements will be posted both on class website and e-learning site

4. Grading • EEL4930/5934 Grading: • Mid-term 1: 20% (Wednesday, October 3) • Mid-term 2: 20% (Wednesday, October 31) • Final exam: 20% • Labs/Homework: 10% • Project: 30% • Final grade: curved average of all components • 5934 will have different tests, homeworks, and project

5. Lab Assignments • Linked off main website and e-learning • http://www.hlam.ece.ufl.edu/EEL4930_5934LabsProj/ • Intended to familiarize with FPGA boards, VHDL • Initials labs will be individual • Will allow groups when using boards

6. Research Project • Groups • Size to be determined based on enrollment • Likely 2-3 per group • Topic subject to instructor approval • Will give examples • Good idea - find algorithm in your area, use RC to improve performance • Imaging processing, bioinformatics, CAD, etc. • If interested in research, make an appointment with me • Will try to find a project that will helps towards degree

7. Reading Material • Textbook: The Design Warrior’s Guide to FPGAs • C. Maxfield • ISBN: 978-0750677045 • Supplemented by research papers • Check class website for daily requirements • Will also post slides when used • Optional books also listed in syllabus

8. Prerequisites • Digital design • Architecture • Controller/Datapath • Memory Heirarchy • Pipelining • More listed in syllabus • Assumes no knowledge of reconfigurable computing

9. Goals • Understanding of issues related to RC (reconfigurable computing) • Detailed investigation of a specific problem • Project/Research Paper • Publish! • Best submissions will be submitted

10. Academic Dishonesty • Unless told otherwise, labs and homework assignments must be done individually • All assignments will be checked for cheating • Groups must obtain permission to use larger size • May be allowed for difficult projects • Collaboration is allowed (and encouraged), but within limits • Can discuss problems, how to use tools etc. • Cannot show code, solutions, etc. • Cheating penalties • First instance - 0 on corresponding assignment • Second - 0 for entire class

11. Attendance Policy • Attendance is optional, but highly recommended • If you are sick, stay at home! • If obviously sick, you will be asked to leave • Missed tests cannot be retaken, except with doctor’s note

12. What is Reconfigurable Computing? • Reconfigurable computing (RC) is the study of architectures that can adapt (after fabrication) to a specific application or application domain • Involves architecture, design strategies, tool flows, CAD, languages, algorithms

13. a b 001010010 001010010 x c y Processor Processor FPGA Processor What is Reconfigurable Computing? • Alternatively, RC is a way of implementing circuits without fabricating a device • Essentially allows circuits to be implemented as “software” • “circuits” are no longer the same thing as “hardware” • RC devices are programmable by downloading bits - just like software Microprocessor Binaries FPGA Binaries (Bitfile) Bits loaded into program memory Bits loaded into CLBs, SMs, etc. 0010 … 0010 …

14. Why is RC important? • Tremendous performance advantages • Implements applications as custom circuit • In some cases, > 100x faster than microprocessor • Alternatively, similar performances as large cluster • But much smaller • Example: • Software executes sequentially • RC executes all multiplications in parallel • Additions become tree of adders • Even with slower clock, RC is much faster • Performance difference even greater for larger input sizes • SW time increases linearly • RC time is basically O(log2(n)) - If enough area is available for (i=0; i < 16; i++) y += c[i] * x[i]

15. When should RC be used? • When it provides the cheapest solution • Generally, depends on volume of devices • Total cost = NRE + Volume*unit_cost • NRE: non-recurring engineering cost • One-time cost involved in creating design • Volume: expected units to be sold • Unit cost: cost of each individual unit • RC is typically more cost effective for low volume devices • RC: low NRE, high unit cost • ASIC: very high NRE, low unit cost

16. When should RC be used? • When circuit may have to be modified • Can’t change ASIC - hardware • Can change circuit implemented in FPGA • Uses • When standards change • Codec changes after devices fabricated • Allows addition of new features to existing devices • “Partial reconfiguration” allows virtual fabric size - analagous to virtual memory • Without RC • Anything that may have to be reconfigured is implemented in software • Performance loss

17. RC Markets • Embedded Systems • RC achieves performance close to ASIC, sometimes at much lower cost • Many embedded systems still use ASIC due to high volume • Reconfigurablilty! • If standards changes, architecture is not fixed • Can add new features after production

18. RC Markets • High-performance computing - HPC • Cray XD-1 • 12 AMD Opterons, FPGAs • SGI Altix • 64 Itaniums, FPGAs • IBM Chameleon • Cell processor, FPGAs

19. RC Markets • General-purpose computing??? • Ideal situation: desktop machine/OS uses RC to speedup up all applications • Problems • RC can be very fast, but not for all applications • Generally requires parallel algorithms • Coding constructs used in many applications not appropriate for hardware • Subject of tremendous amount of past and likely future research

20. CHREC • NSF Center for High-Performance Reconfigurable Computing • http://www.chrec.ufl.edu/