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Mass Production of Photovoltaic Modules: Low Cost Fabrication, Performance and Potential. W. S. Sampath Materials Engineering Laboratory Dept. of Mechanical Engineering Colorado State University, Fort Collins, Colorado. 2. Overview. I. Description of Solar Photovoltaics
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Mass Production of Photovoltaic Modules: Low Cost Fabrication, Performance and Potential W. S. Sampath Materials Engineering Laboratory Dept. of Mechanical Engineering Colorado State University, Fort Collins, Colorado
2 Overview I. Description of Solar Photovoltaics II. PV Market and Industry III. Development of a New Manufacturing Technology at CSU IV. Device Performance, Reliability Testing V. Team Members and Future Plans
4 Solar Photovoltaics Photovoltaics (also called solar cells or PV) • Solid state conversion of light to electricity • n-type and p-type semiconductors: diode • First modern PV developed in the 1950’s
5 PV’s Benefits for Electricity Generation I. Environmental benefits • Electricity generation with no pollution • No greenhouse gas emissions • “Fuel” is already delivered free everywhere II. Benefits as an energy resource • Minimal maintenance / Maximum reliability • Systems are easily expanded • Not effected by fluctuating fuel costs • Distributed generation: generate where electricity needed III. National benefits • Domestic energy resource (energy security) • Energy independence PV's costs are limiting more wide spread application
6 PV’s Advantages: Peak Power I. Electricity demand varies with time of day and season • Driven by air cond. loads and commercial activity • Greatest in hot summer afternoons II. Example: • California: Peak summer loads = 57 G Watt • 45% more than base loads (Glen Canyon Dam = 1.2 G W) PV generation is generally coincident with greatest demand
7 Typical Roof Top System
PV market heavily price driven: If module prices are $2/Watt “Market is "infinite" * 11 PV Market Conditions I. Future Market • Continued 30-40% growth • California Goal: Solar Homes • Germany, Japan and Spain
Global Production of Solar Cells MW 44% CAGR (1999 – 2006) Market doubling every two years Source: PHOTON
13 I. Crystalline Silicon (c-Si: mono and poly crystalline) • Approx. 95% of PV is made from c-Si semiconductors • C-Si feedstock are a dominant cost in Si PV PV Industry
14 PV Industry I. Current productivity increases based on incremental improvements of existing technology II. Crystalline Silicon limitations • Difficult to add new feedstock capacity: stringent feedstock purity requirements • Slow batch processing • Energy intensive manufacturing: 3-5 years for c-Si PV to payback the energy used in manufacturing III. Best case with current technology: • By 2010 C-Si PV costs will drop only by 25%* • PV will not broadly competitive with traditional energy resources *Source: CLSA Asia-Pacific Markets; graphic: PHOTON International
15 Outlook for Current Industry PV growing! …but: • Still less than 0.1% of energy production in main markets • Current industry standard (c-Si) is not able to achieve very large scale energy contribution • Huge market left untapped, c-Si unable to fulfill long term market needs New non c-Si PV technology needed for PV to realize its full potential : thin film PV
CSU's Project to Reduce PV Costs 17 I. Project Goals: Develop manufacturing processes and hardware to reduce the cost of PV generated electricity II. Approach: CdTe thin film PV on window glass manufactured with lean, continuous, automated processes • CdTe semiconductors: Avoids c-Si feedstock bottlenecks and cost • Thin film on window glass: Reduce amount of semiconductor material needed (c-Si PV based on silicon wafer) • Lean automated manufacturing: Eliminates batch processing most efficient, lowest cost manufacturing technique • Emphasis on understanding process to promote scalability
Thin Film CdTe PV 18 I. Advantages of thin film CdTe over c-Si ·100 times LESS purity required · 100 times LESS semiconductor material needed CdTe thin film on window glass substrates (Si PV uses monolithic wafer) • No feedstock limitations: Cd and Te byproducts of Zn and Cu mining, new sources of Te discovered II. Challenges · C-Si very mature, well understood can borrow insight from microelectronics industry • Need to develop processes, hardware, QC techniques specific for CdTe thin film PV CdTe PV has significantly lower intrinsic costs that c-Si PV. CdTe thin film as future for low cost PV.
Response to Challenges, Past Failures 19 I. Step by step approach: Developing highly controlled, scalable processes and hardware • Develop detailed understanding of process • Develop only process that are scalable and manufacturability and lean • Define each stage of condition 3x3 inch pilot process 2 MW/yr. prod. prototype Large scale manufacturing • Each stage of the process defined: - Substrate temperature - Vapor flux - Residual gas
3 4 5 6 1 7 2, vacuum boundary 20 Our Approach to PV Manufacturing CdTe PV Module Processing Line Schematic (1) Laser scribe and substrate cleaning (2) Semiconductor fabrication (3) Laser scribe (4, 5) Back electrode application (6) Abrasive scribe of back electrode to provide series interconnection (7) Lamination and encapsulation Steps 2, are new to our technology and are the focus of our research all other steps are successfully performed in the industry
Process Schematic Semiconductor Fab. 21 I. Semiconductor Processing • Vacuum thin film deposition • Sublimation of solid materials • 7 process deposition, annealing and heat treatment process steps • All process heads similar II. Manufacturing efficiency • Fully lean, automated continuous • 2 min cycle time Glass in / Completed device out every 2 min.
Processing Systems 22 This process and hardware definition has potential to reduce cost of PV electricity to compete with traditional sources Two PV processing systems developed in our lab 1) A pilot scale system for processing 3x3 inch substrates 2) The first portion of a 2 MW/yr. production prototype
Device Structure 26 Device structure: • Glass/ SnOX:F / CdS / CdTe / carbon / nickel • Unmodified window glass substrates (Pilkington LOF Tec 15) Sun Light Sun Light Glass Substrate Glass Substrate T TCO Contact CdS: 0.3 microns CdS: 0.3 microns ~ ~ 1.9 microns 1.9 microns CdTe: 1.6 microns CdTe: 1.6 microns Carbon/acrylic Nickel/ acrylic contact Device structure (not to scale)
27 Device Performance • Initial Device Performance • Routine 11.5 – 13% efficiency • NREL verified 12.44% (poly c-Si efficiencies: 12-15%) • Long Term Performance • Devices tested outdoors • 700 devices tested for performance under stress • Conditions (temp controlled) • 65 and 77˚ C with a 5/8 hr illumination • 100˚ C continuous illumination • One sun • Desiccated air Reliability is critical aspect for PV, 20 year life expected Challenge: to determine life (without testing for 20 years) and develop a QC technique to ensure manufacture of reliable modules
Device Reliability Tests 6650-3,8,2B 6552-9,2B and 6649-1B 7236-4,5B and 7233-1B 8033-4,6,9,1B 28 Outdoor Performance for Optimal Process Conditions Desiccated, Open Circuit bias 14 12 10 8 Average efficiency [%] 6 4 2 0 0 100 200 300 400 500 600 700 800 900 1000 total time [days] Outdoor Stability Performance • Excellent performance in outdoor conditions • Specialized fixture to test cells (no module issues) • Tests ongoing • Little or no change on average, even at stressful open circuit conditions
Device Reliability Tests Accelerated Stress: 65C, Open Circuit, One Sun 5 hr. Illumination/8 hr. cycle 12 10 Average Efficiency [%] 8 6 5152 4 6552, 6652, and 6649 2 7233 and 7236 0 0 5000 10000 15000 20000 25000 30000 29 Time [hrs] Accelerated Stress Performance • Extremely long term testing under stressful temperature and bias • Efficiency levels • Tests ongoing. • Correlation to outdoor when statistically valid drop in outdoor devices
QC Technique to Ensure Performance 30 Quality Control Technique Needed to Ensure Performance: Current/Voltage (JV) behavior of devices with out copper doping/back contact processing is predictive of stability of fully processed devices
Research to Understand Underlying Mechanisms of Device Performance 31 Thermal Admittance Spectroscopy (TAS): • Variation in the device capacitance with charge carriers filling defects/traps • Change in temperate enables identification of specific traps Thanks to Al Enzenroth
Different Trap Signatures and Processing 32 Variation in trap energy and density seen with different processing conditions Optimal Processing conditions have not detectible traps (Ev band to mid gap) by TAS New techniques being developed in Lab to identify variation in traps in upper half of band gap
Process Uniformity 33 Process Uniformity: Initial device performance · Nine hours of operation with same source charge · System operation with same CdS, CdTe and CdCl2 source charges .
Consistent Processing Open circuit voltage vs. system running time for device with no intentional Cu 800.0 700.0 Short circuit current over system running time for devices 600.0 with no intentional Cu 500.0 22.0 20.0 400.0 Voc (mV) 18.0 300.0 16.0 200.0 14.0 12.0 100.0 Jsc (mA/cm2) 10.0 0.0 8.0 0.76 1.97 3.17 4.37 5.57 6.77 7.97 9.17 6.0 System Running Time (hr.) 4.0 2.0 0.0 0.76 1.97 3.17 4.37 5.57 6.77 7.97 9.17 System Running Time (hr.) 34 Process Head Development • Over 9 hour operation without replenishment of source charge • Consistent Voc/Jsc (no intentional Cu) • Repeatability significantly demonstrated
Process Uniformity 35 Average Efficiency Vs. Accelerated Stress Time for Three Groups of Cells. (Stress conditions are: 65 C, 1 sun, 5 hrs on/ 3 hrs off) Process Uniformity: Consistent device performance and stability with long duration processing
SIMS Cu Profiles Before and After Long Term Accelerated Stress Unstressed Cu Concentration maintained 36 • Minimal changes in Cu depth profile with stress. • If device is optimally processed: Cu migration is not a 1st order stability problem SIMS data: S. Asher NREL
Steady State Photocapacitance Spectrums 1.8 poor Cd chloride 1.6 no Cd chloride 1.4 optimum Cd chloride 1.2 1.0 normalized photocapacitance 0.8 0.6 0.4 0.2 0.0 0.73 0.77 0.83 0.89 0.95 1.03 1.13 1.24 1.38 Incident Photon Energy (eV) • +0.4 V during PHCAP ; +1 V bias at room temp and during cool down • Poor treatment increases trap density over non treated sample • Optimum treatment decreases trap density over non treated sample 37
Spectroscopic Ellipsometry Tec 15 glass (SnO2:F /SiO2/SnO2/Glass) + CdS +CdTe+ CdCl2 treatment Optical constants (n,k), thickness of layer from SE could be used as QC Acknowledgement: James N. Hilfiker, Woollam Co. Inc
39 A Current PV Application PV Powered LED Lantern: • Kerosene lantern fumes similar to smoking pack of cigarettes • PV/LED light cost = Approx. 1 years kerosene fuel cost 2 Billion people in the world have no electricity
Current and Future Efforts 40 . I. Production Demonstrate production of 2ft X 4ft modules - Nominal 200 MW/yr. factory if run in full production mode at AVA Solar - Beta testing of modules II. Advance Process and Device Understanding • Refine process definition, include more complex alloys • Continue reliability testing • Improve understanding of device behavior/role of defects and traps • Advance student education
Team Involvement 41 I. CSU Materials Engineering Lab • W. S. Sampath, Robert Enzenroth and Kurt Barth II. CSU Industrial Engineering • Bill Duff: manufacturing model III. CU Mechanical Engineering Dept. Thermo Lab director: R. Mahajan: Thermal modeling and PV/LED lamp IV. Collaborators: • CSU PV Testing Lab: J. Sites and students • CSU Chemistry Central Instrument Facility: S. Kohli, P. MaCurdy Pacific Northwest Natl. Lab: L. Olsen, S. Kundu • National CdTe R&D Team: consortium of industries, leading academic researchers and national laboratory members working to advance CdTe PV. V. Industry: • Abound Solar: local company, P.Noronha, CEO Support from NSF, NREL, US DOE, UN, USAID and NSC