1 / 13

Progress report on LAL activities

Progress report on LAL activities. P rospects. In parrallel : To exploit and combine two major technology advances and evaluate potential beneficts Use 130 nm CMOS and potential availability of 65 nm in Research laboratories in close cooperation and coordination with CERN- Mic

lora
Download Presentation

Progress report on LAL activities

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Progress report on LAL activities

  2. Prospects • In parrallel : To exploit and combine two major technologyadvances and evaluatepotentialbeneficts • Use 130 nm CMOS and potentialavailability of 65 nm in Researchlaboratories in close cooperation and coordination with CERN-Mic • ( process of building a 65 nm « club » or task force) • Takeadvantage of « open » TSV providers in Europe to demonstrate the feasability of TSVs on functional detector chips.

  3. OMEGAPIX2 project : CHIP for pixel readout (IBM 130 nm)chartered-Tezzaron • Targets : • Low threshold (1000 e) • Low noise ~300 fF • Cope with high leakage current (up to 100 nA per channel) • 8 bits local threshold adjustment • Time-Over-Threshold measurement • 3 bits • Clock multiplier (40Mhz to 160 Mhz) possible • Optimized readout for maximum charge measurement accuracy and event pile-up • On pixel memory of up to 3 event between each Lv1 clear • Ambitious goal is to couple this chip to a sensor and bring it in test-beam for performance study, radiation damage studies • Entangled with Slim Edge sensor R&D to produce 4 side buttable device 3 bits Range = ~ 10,000 e- Step = ~ 1250 e-

  4. OMEGAPIX2 sensor For ATLAS HL-LHC • Reduction of Phi resolution has been shown to be more beneficial to ATLAS tracking performance than Z resolution -> Pixel of 35x200 um • OMEGAPIX2 will provide a complete read-out chain usable in testbeam and other complete standalone system test • The chip could provide spectroscopic measurements at low luminosity (ie details charge measurement) and fast operation at higher luminosity Active inactive Planar Pixel Sensor

  5. VTT OMEGAPIX ~400µm • VTT OMEGAPIX (SlimEdge & Edgeless) designs: • 12 GR +BR • 1GR + BR • 0 GR + BR • 0 GR & 0 BR • 1GR & no BR • All designs: • Active Area: 4800 x 3360 µm2 • Array: 96x 24 (ϕ,z) • Pixel Size : 35 x 200 µm2 • Thickness: 100 & 200 µm z ϕ ~25µm 12GR+BR ~125µm 0GR + 0BiasRing ~35µm 1GR +BiasRing ~100µm 0BiasRing+1GR Ali Harb - PPS Meeting oGR+ BiasRing

  6. W 2 W 1 W 3 W CiS OMEGAPIX • 32 CiS OMEGAPIX detectors werereceived • 24 of new design (Ω1, Ω2 and Ω3) • 8 of old design (Ω) • Ω1 & Ω2 werevery close to the wafer edge • Both designs: • 12 GR ~400 µm inactive edge • Active Area: 4800 x 3360 µm2 • Pixel Size : 35 x 200 µm2 (ϕ,z) • 300 µm thick • Different pixel arrays: • Old: 16 x 142 (ϕ,z) • With longer edge pixel • New: 96x 24 (ϕ,z) • Compatible with the 3D design electronics z ϕ ~400 µm ~400 µm Old design (LAL) New design (LAL) Ali Harb - PPS Meeting

  7. VTT SlimEdge: ~100µm ~125µm 1GR + BiasRing BiasRing + 0 GR 2ooum 2ooum 1ooum VTT: BiasRing + 1GR 100-200µm thickness Vbd ~ 100V to 140V VTT: BiasRing 100-200µm thickness Vbd ~ 75V to 120V Ali Harb - PPS Meeting

  8. NOTICE • Thin VTT detectors are competitive and showed good results. • To do: • Capacitance measurements to bedone • New set of Edgeless & SlimEdge VTT detectors isexpectedsoon • 3D design chip willbeinterconnected to some of the thinVTTs Ali Harb - PPS Meeting

  9. Thin VTT detectors are competitive and showed good results. • To do: • Capacitance measurements to bedone • New set of Edgeless & SlimEdge VTT detectors isexpectedsoon • 3D design chip willbeinterconnected to thin CIS and VTTs pixel matrix

  10. Sensordeveloppement: Guard Ring Sensor 0. 4mm 0. 4mm 6 mm 0. 36mm Chip Z Active area Guard rings Phi GR over chip 4.5 mm In X : 24 pixel of 200 microns In Y : 96 * 35 microns 0. 5mm Active zone : 4.8mm x 3,36 The GR are overlapping the chip by 100 um on the Z edges and by 140 um on the top Phi edge 1 mm Omegapix2 chip Foundry Cis

  11. Sensordeveloppement: Active EdgeSensor 0. 1mm 0. 1mm 5 mm Chip Z Active area Guard rings Phi Long pixels 3.46 mm In X : 24 pixel of 200 microns In Y : 96 * 35 microns Chip 5x5mm 100 umedges in z side 50 umedge in phi side 1.59 mm Omegapix2 chip Foundry VTT

  12. Industryoffers

  13. Project forecast & Time scale • A-operation: is to getslimedge Pixel sensors (IZM) with Omegapix2 chip- 05/2012 • B-operationis to getedgless pixel sensors (VTT) with Omegapix2 chip- 05/ 2012 • Thirdstepis to have an Omegapix ASIC readout 130nm (end 2013) coupled to pixel matrix (std bond) • And translate the design to 65nm and via last interconnecttechnology • Deliver a 4 sideabuttablemonolithicedglessdevicewhere I/O signals are routedverticallythrough the readout chip (~2015) Thankyou

More Related