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DSP56800E Instruction Set

DSP56800E Instruction Set. Instruction set can be categorized as follows: Multiplication: integer and fractional multiplication and multiply-accumulate operations. Arithmetic: all arithmetic operations other than multiplication. Shifting: shift and rotate operations.

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DSP56800E Instruction Set

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  1. DSP56800E Instruction Set • Instruction set can be categorized as follows: • Multiplication: integer and fractional multiplication and multiply-accumulate operations. • Arithmetic: all arithmetic operations other than multiplication. • Shifting: shift and rotate operations. • Logic: Boolean logic functions, such as AND, OR, and NOT. • AGU arithmetic: address calculation operations. • Bit manipulation: instructions for manipulating values at the bit levels. • Looping: instructions that support iterative looping. • Move: data movement operations. • Program control: instructions that control execution flow. • Note: most instructions involve memory access Introduction to 5685x Series

  2. Memory Access • Move Instructions that access data or program memory. • Arithmetic or bit-manipulation instructions where one operand is located in data memory. • Parallel move instructions that perform an operation and move data to or from memory simultaneously Introduction to 5685x Series

  3. Memory Access Taking One Cycle • One instruction fetch • One read from data memory • One write to data memory • Two reads from data memory • One instruction fetch and one read from data memory • One instruction fetch and one write to data memory • One instruction fetch and two reads from data memory Introduction to 5685x Series

  4. Data Type Least Significant Portion (LSP) 0x000A Most Significant Portion (MSP) 0x000B 15 0 7 • Integer Types: • Byte (8-bit) • Word (16-bit) • Long Word (32-bit) • Fractional Data Types • Word • Long Word S S . . Upper Byte Lower Byte Word 0 15 S . Long Word 31 0 S . MSP LSP 16-bit Introduction to 5685x Series

  5. Data Formats • Signed Integer • Unsigned Integer • Signed Fractional • Unsigned Fractional • Byte (N = 8) • Word (N =16) • Long Word (N = 32) Introduction to 5685x Series

  6. Integer Vs Fractional Fractional Value = Integer Value/215 Introduction to 5685x Series

  7. Memory Space Syntax • X: indicates accessing data memory • P: indicates accessing program memory • The size of data accessed from memory is indicated by a suffix: • “.W” suffix—indicates word memory accesses • “.L” suffix—indicates long memory accesses • “.B” suffix—indicates byte memory accesses • “.BP” suffix—indicates byte memory accesses The difference between .B and .BB is the way byte is accessed in the Word memory location Introduction to 5685x Series

  8. Instructions Accessing Data MemorySigned & Unsigned Moves Example: MOVE.L A10,X:(R3+$1000) Introduction to 5685x Series

  9. Addressing Modes - Summary • Immediate • Absolute • Direct • Indirect • Indexed • Circular Introduction to 5685x Series

  10. Addressing Modes • Immediate • Value of operand (data) specified directly in instruction. • Examples: MOVE.W #$4301, A ; Load accumulator A with 31 MOVE.W #4301, A; Load accumulator A with 4301 MOVE.W #%1010, A; Load accumulator A with 16-bit binary $000A. • Absolute • Address of operand specified directly in instruction • MOVE.W X:$FF22, A; Load A with number stored in address $FF22 of memory “X”. • Register-Direct • Example: MOVE R1, A; Operands are internal registers (i.e: R1, A) • Data stored in registers • Register-Indirect Addressing or Indirect Addressing: • Register contains address of (points to) memory location in which data is stored • Example: MOVE.W X:(R1), A • Indexed Addressing • Similar to indirect addressing but pointer incremented by an offset before accessing memory. Example: MOVE.W X:(R1 + 5), A Introduction to 5685x Series

  11. Circular Address • Normal buffer except when reaching the end, it loops back to the starting point • Define starting point • Define buffer size Introduction to 5685x Series

  12. Addressing Modes – DSP 56858 Introduction to 5685x Series

  13. Notation Used Introduction to 5685x Series

  14. Indirect Addressing – No Update: (Rn) Introduction to 5685x Series

  15. Indirect Addressing – Post Increment: (Rn)+ Introduction to 5685x Series

  16. Indirect Addressing – Post Decrement: (Rn)- Introduction to 5685x Series

  17. Indirect Addressing – Post Update by Offset N(Rn)+N, (R3)+N3 Introduction to 5685x Series

  18. Index Addressing by 3-bit Displacement:(RRR+x), (SP-x) • Offset from 0 to 7 when R0, R1, R2, R3, R4, R5 or N is used • Offset from –1 to –8 when SP is used • Offset embedded within the instruction Introduction to 5685x Series

  19. Index Addressing by 3-bit Displacement: (SP-xx) • Offset always from –1 to –64 when SP is used • Offset embedded within the instruction Introduction to 5685x Series

  20. Index Addressing by 16-bit Displacement: (Rn+xxxx) • Offset as two’s complement • Offset embedded within the instruction as a second word Introduction to 5685x Series

  21. Index Addressing by 24-bit Displacement: (Rn+xxxxxx) • Offset as two’s complement • Offset embedded within the instruction as 2 words Introduction to 5685x Series

  22. Instructions Accessing Data MemorySigned & Unsigned Moves Example: MOVE.L A10,X:(R3+$1000) Introduction to 5685x Series

  23. Immediate Addressing Modes • 4- bit immediate data: #x • In AGU arithmetic or ALU shifting, it is zero extended to form 24-bit value (considering unsigned value) • 5-bit immediate data: #xx • If used to load the accumulator it is sign extended • If used in ALU arithmetic instructions it is zero extended. • 6-bit immediate data: #xx • Unsigned value • Zero extended • 7-bit immediate data: #xx • Signed value • Sign extended • 16-bit immediate data: #xxxx • Sign extended when using MOVE.L • Zero extended when using MOVEU.W • 32-bit immediate data: #xxxxxxxx • Truncated when moved to 24-bit register • Sign extended when moved to accumulator Introduction to 5685x Series

  24. Absolute Address Modes • Specify address of the operand directly in a field of the instruction • Absolute short address: aa • I/O short address:<<pp • 16-bit absolute address: xxxx • 24-bit absolute address Introduction to 5685x Series

  25. Assembler Operator Syntax for Immediate Data Size & Absolute Addressing Introduction to 5685x Series

  26. Absolute Short Address: aa • Operand occupies 6-bit in the instruction • Zero extended to 24-bit • Used to direct access the first 64 locations in memory Introduction to 5685x Series

  27. I/O Short Address: <<pp • Instruction specifies only the 6 LSBs of the effective address • The upper 18 bits are hired wired to a specific area of memory, for the DSP56858 it is $1FFFC0 • Used to directly access on-chip peripherals Introduction to 5685x Series

  28. 16-bit Absolute Address: xxxx MOVE.W:$8079,X0 • Zero extended to 24-bit Introduction to 5685x Series

  29. 24-bit Absolute Address: xxxxxx Introduction to 5685x Series

  30. Register Direct Mode • At least one of the operand is either in AGU, ALU, or control registers. • Example: • MOVE.W R0, X0 Introduction to 5685x Series

  31. AGU Modulo Addressing • Modulo Addressing Features: • Available for byte, word, and long accesses • Available for the R0 and R1 pointers only. • Address arithmetic is performed to calculate the effective address • Supports buffer sizes from 2 locations to 16384 words (2 to 8192 for long values) • M = M01 + 1 = buffer size • Find k such that 2k >= M • Lower Boundary obtained by setting low-order k bits to zero in R0 and R1 Introduction to 5685x Series

  32. AGU Modulo Addressing: M01 configuration Introduction to 5685x Series

  33. Modulo Addressing Example Example: Buffer size = 9 M01 = $0008 R0 modulo • Works for decrementing addressing modes too • Modulo operation works correctly even if the pointer does not land exactly on upper or lower boundary • Modulo buffer sizes are not constrained to a power of two Introduction to 5685x Series

  34. Byte & Word Addressing • Word addressing can be used to access • Byte • Word • Long Word • Byte addressing can be used to access bytes only Introduction to 5685x Series

  35. Byte Pointers Vs Word Pointers • Word pointers can be used to access a data element of any size, so they should be used when mixed data is accessed (such as in data structures) • Disadvantage: Word pointer in a post-update addressing mode may result in skipping some bytes that cannot be accessed. • Using byte pointers fixes this problem. Introduction to 5685x Series

  36. Accessing Byte Values using Byte Pointers • .BP suffix used to specify a byte pointer (byte address) – Examples: MOVE.BP; MOVEU.BP; ADD.BP • The address contained in the AGU specifies a byte address • The LSB of the AGU register determines lower or higher byte • The address is right shifted to give the correct word address Introduction to 5685x Series

  37. Accessing Byte Values using Byte Pointers Example: Introduction to 5685x Series

  38. Accessing Word Values Using Word Pointers Word memory accesses always use an address as a word pointer Example Word (16-bit) variables are naturally aligned correctly using word addressing ;each address is treated as referring to a 16-bit data value. Data accesses to program memory are always treated as word accesses and behave the same as word accesses to data memory. Introduction to 5685x Series

  39. Accessing Long Word Values Using Word Pointers Long Word memory accesses: word pointeralwaysaligned on an even word address except for the Stack Pointer (SP) In an addressing mode that uses the stack pointer, the effective address is the odd address that contains the upper word of the 32-bit value Even if SP points to odd address still the long word is aligned to even word address Introduction to 5685x Series

  40. Accessing Byte Values using Word Pointers Example: • MOVE.B and MOVEU.B instructions used with an offset to address register • The offset contained in the instruction is first shifted left arithmetically • The address contained in AGU register is added to the shifted immediate offset to get the word address • The least significant bit (LSB) of the immediate offset determines which byte at the calculated word address is to be accessed Introduction to 5685x Series

  41. Instructions Accessing Data MemoryMoving Words from Memory to Registers • AGU and Program Controller registers almost always deal with unsigned values (MOVEU.W). • For ALU registers, MOVE.W is most frequently used. Example 1: MOVEU.W X:(R0+$21), R3 Example 2: MOVE.W X:(R0+$20), A Introduction to 5685x Series

  42. Instructions Accessing Program Memory • Data size accessed from program memory is always 16-bit. • .W suffix used in all times. • Rules are the same as the ones for accessing data memory • Examples: • MOVE.W P:(R0)+,X0 ; Read 16-bit signed word from program memory • MOVEU.W P:(R0)+,R3 ; Read 16-bit unsigned word from program memory • MOVE.W R2,P:(R0)+ ; Write 16-bit word to program memory Introduction to 5685x Series

  43. Instructions with Operand in Data Memory • Operand located in data memory. • Example: ADD.W X:$4000, A • Steps involved • Move operand from memory location to temporary register inside ALU • Add that to Accumulator A • Store result back in A Introduction to 5685x Series

  44. Parallel Moves • Two Types: • Single parallel move • Dual parallel read • One or two word-size moves occur in parallel with an arithmetic operation • One write (single parallel move) • One read (single parallel move) • Two read operations (dual parallel move) • Both allow execution using a single instruction and in one instruction cycle. • Restricted to arithmetic operations in the ALU. Introduction to 5685x Series

  45. Parallel Moves Dual Parallel Read Single Parallel Move Introduction to 5685x Series

  46. Parallel Moves – FIR Filter + + R1 R0 CLR A X:(R1)+, Y1 DO #No-1, Loop MAC Y1, X0, A X:(R1)+,Y1 MOVE.W X:(R0)+, X0 Loop AGU 1 Y1 X0 R1 X 1 R0 ALU + Accumulator Data Memory Introduction to 5685x Series

  47. Data Alignment • When Reading Byte, Word or Long Word from memory into registers they are aligned in a specific way. • Data Alignment in Accumulators • Data Alignment in Data Registers • Data Alignment in 24-bit AGU and Control Registers • Data Alignment in 16-bit AGU and Control Registers Introduction to 5685x Series

  48. Data Alignment in Accumulators Introduction to 5685x Series

  49. 16-bit Multiplication Signed Fractional 16-bit Multiplication Signed Integer 16-bit Multiplication Introduction to 5685x Series

  50. Data Alignment in Data Registers Supported data types in data registers:X0, Y0, Y1 Introduction to 5685x Series

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