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Semiconductor Device Modeling and Characterization – EE5342 Lecture 35 – Spring 2011

Semiconductor Device Modeling and Characterization – EE5342 Lecture 35 – Spring 2011. Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc/. Flat-band parameters for p-channel (n-subst). Fully biased p- channel V T calc. p-channel V T for V C = V B = 0. Fig 10.21*.

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Semiconductor Device Modeling and Characterization – EE5342 Lecture 35 – Spring 2011

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  1. Semiconductor Device Modeling and Characterization – EE5342 Lecture 35 – Spring 2011 Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc/

  2. Flat-band parametersfor p-channel (n-subst)

  3. Fully biased p-channel VT calc

  4. p-channel VT forVC = VB = 0 Fig 10.21*

  5. Ion implantation

  6. “Dotted box” approx

  7. Mobilities

  8. Differential chargesfor low and high freq high freq. From Fig 10.27*

  9. Ideal low-freqC-V relationship Fig 10.25*

  10. Comparison of lowand high freq C-V Fig 10.28*

  11. Effect of Q’ss onthe C-V relationship Fig 10.29*

  12. n-channel enhancementMOSFET in ohmic region 0< VT< VG Channel VS = 0 0< VD< VDS,sat EOx,x> 0 e-e- e- e- e- n+ n+ Depl Reg p-substrate Acceptors VB < 0

  13. Conductance ofinverted channel • Q’n = - C’Ox(VGC-VT) • n’s = C’Ox(VGC-VT)/q, (# inv elect/cm2) • The conductivity sn = (n’s/t) q mn • G = sn(Wt/L) = n’s q mn (W/L) = 1/R, so • I = V/R = dV/dR, dR = dL/(n’sqmnW)

  14. Basic I-V relationfor MOS channel

  15. I-V relation for n-MOS (ohmic reg) ohmic ID non-physical ID,sat saturated VDS VDS,sat

  16. Universal draincharacteristic ID VGS=VT+3V 9ID1 ohmic saturated, VDS>VGS-VT VGS=VT+2V 4ID1 VGS=VT+1V ID1 VDS

  17. Characterizing then-ch MOSFET VD ID D G B S VGS VT

  18. Low field ohmiccharacteristics

  19. MOSFET DeviceStructre Fig. 4-1, M&A*

  20. 4-7a (A&M)

  21. Figure 4-7b (A&M)

  22. Figure 4-8a (A&M)

  23. Figure 4-8b (A&M)

  24. Body effect data Fig 9.9**

  25. MOSFET equivalentcircuit elements Fig 10.51*

  26. n-channel enh.circuit model G RG Cgd RDS Cgs RD S D Cbd RB Cbs Idrain Cgb DSS DSD RB B

  27. MOS small-signal equivalent circuit Fig 10.52*

  28. MOSFET circuitparameters

  29. MOSFET circuitparameters (cont)

  30. Substrate bias effect on VT (body-effect)

  31. Body effect data Fig 9.9**

  32. Fully biased n-channel VT calc

  33. Values for fmswith silicon gate

  34. Q’d,max and xd,max forbiased MOS capacitor Fig 8.11** |Q’d,max|/q (cm-2) xd,max (microns)

  35. I-V relation for n-MOS ohmic ID non-physical ID,sat saturated VDS VDS,sat

  36. MOS channel-length modulation Fig 11.5*

  37. Analysis of channellength modulation

  38. References • CARM = Circuit Analysis Reference Manual, MicroSim Corporation, Irvine, CA, 1995. • M&A = Semiconductor Device Modeling with SPICE, 2nd ed., by Paolo Antognetti and Giuseppe Massobrio, McGraw-Hill, New York, 1993. • **M&K = Device Electronics for Integrated Circuits, 2nd ed., by Richard S. Muller and Theodore I. Kamins, John Wiley and Sons, New York, 1986. • *Semiconductor Physics and Devices, by Donald A. Neamen, Irwin, Chicago, 1997

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