1 / 17

HC12 & MC9S12C32

HC12 & MC9S12C32. By: Prof. Mahendra B. Salunke Asst. Prof., Department of Computer Engg, SITS, Pune-41. Email: msalunke@gmail.com URL: microsig.webs.com. Contents. Introduction to HC12 family MC9S12C32 features Block Diagram Programming Model Pin outs and Signals System Clock.

lyris
Download Presentation

HC12 & MC9S12C32

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. HC12 & MC9S12C32 By: Prof. Mahendra B. Salunke Asst. Prof., Department of Computer Engg, SITS, Pune-41 Email: msalunke@gmail.com URL: microsig.webs.com

  2. Contents • Introduction to HC12 family • MC9S12C32 features • Block Diagram • Programming Model • Pin outs and Signals • System Clock

  3. Introduction to HC12 family • A high-speed, 16-bit processing unit • Instruction set is a proper superset of the M68HC11 instruction set • Full 16-bit data paths supports efficient arithmetic operation and high-speed math execution • Supports instructions with odd byte counts, including many single-byte instructions. This allows much more efficient use of ROM space.

  4. Introduction to HC12 family Continued… • An instruction queue • Extensive set of indexed addressing capabilities • Using the stack pointer as an indexing register in all indexed operations • Using the program counter as an indexing register in all but auto increment/decrement mode • Accumulator offsets using A, B, or D accumulators • Automatic index predecrement, preincrement, postdecrement, and postincrement (by –8 to +8)

  5. 16-bit HCS12 core Wake-up interrupt inputs Memory: 2KiB RAM and 32KiB EEPROM Analog-to-digital converters One 1Mbps, CAN 2.0 Timer module (TIM) PWM module One asynchronous serial communications interface (SCI) One synchronous serial peripheral interface (SPI) MC9S12C32 features

  6. MC9S12C32 features • Clock reset generator module • Operating frequency: 32MHz equivalent to 16MHz bus speed for single chip • Internal 2.5V regulator • 48-pin LQFP, 52-pin LQFP, or 80-pin QFP package • Development support: • Single-wire background debug mode (BDM) • On-chip hardware breakpoints • Enhanced DBG12 debug features

  7. Block Diagram

  8. Programming Model

  9. Condition Code Register • Five status indicators • Half carry (H) • Negative (N) • Zero (Z) • Overflow (V) • Carry/borrow (C) • Two interrupt masking bits • X Mask Bit • I Mask Bit • STOP instruction control bit: • Clearing the S bit enables the STOP instruction

  10. Pin outs

  11. Pin outs

  12. Pin outs

  13. Signals

  14. Signals

  15. Signals

  16. System Clock

  17. Happy Learning Contact Details: Email: msalunke@gmail.com URL: microsig.webs.com

More Related