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VGA Display. Matlab. ISEOF FROM MSG_DEC. VALID. Line legend. RESET TO CMP. 1 bit. VALID. REQ. Message Decoder. RAM Controller. 8 bits. RD_adress. 10 bits. 16 bits. POSITION. RGB. 22 bits. Display Controller. WR_address. WREN. DATA. RAM. UART. UART RXD. UART RXP.
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VGA Display Matlab ISEOF FROM MSG_DEC VALID Line legend RESET TO CMP 1 bit VALID REQ Message Decoder RAM Controller 8 bits RD_adress 10 bits 16 bits POSITION RGB 22 bits Display Controller WR_address WREN DATA RAM UART UART RXD UART RXP REG Controller DATA EN DATA DATA FIFO VALID UART TXD from UART TX REQ DEC CRC CLC REG CRC RX REG Type REG AddrREG Len REG Type COL_EN COLOR ISEOF FROM MSG_DEC RunLen Decoder DATA DATA REGISTERS MP REGS CMP REG CRC STATUS RX_RDY to MEM READ DATA DATA_RDY from MEM READ REQ RESET FROM MSG_DEC Mem Write EN REP RX_RDY from MEM READ DATA_RDY to MEM READ Address SDARM ACK DATA REQ SDRAM Controller COLOR DATA DATA DATA Arbiter Mem Read UART TXD to UART TX REQ VALID ACK TX PACK UART TXP DATA 40MHZ Adress Reset Debouncer PLL Resets 50MHZ 133MHZ REQ 133MHZ (-3ms) VALID