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Router Construction

This article explores the design and implementation of a high-speed IP router with a focus on switch fabrics, input/output ports, buffering, and self-routing fabrics. The goal is to achieve high throughput and scalability while efficiently managing circuit and packet routing.

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Router Construction

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  1. Router Construction Outline Switched Fabrics IP Routers Extensible (Active) Routers CS 461

  2. I/O bus CPU Interface 1 Interface 2 Interface 3 Main memory Workstation-Based • Aggregate bandwidth • 1/2 of the I/O bus bandwidth • capacity shared among all hosts connected to switch • example: 800Mbps bus can support 8 T3 ports • Packets-per-second • must be able to switch small packets • 100,000 packets-per-second is achievable • e.g., 64-byte packets implies 51.2Mbps CS 461

  3. Input Output port port Output Input port port Fabric Output Input port port Output Input port port Switching Hardware • Design Goals • throughput (depends on traffic model) • scalability (a function of n) • Ports • circuit management (e.g., map VCIs, route datagrams) • buffering (input and/or output) • Fabric • as simple as possible • sometimes do buffering (internal) CS 461

  4. Buffering • Wherever contention is possible • input port (contend for fabric) • internal (contend for output port) • output port (contend for link) • Head-of-Line Blocking • input buffering CS 461

  5. Crossbar Switches CS 461

  6. Inputs D D D D D D D D D D D D D D 1 2 3 4 Outputs Knockout Switch • Example crossbar • Concentrator • select l of n packets • Complexity: n2 CS 461

  7. Shifter (a) Buffers Shifter (b) Buffers Shifter (c) Buffers Knockout Switch (cont) • Output Buffer CS 461

  8. Self-Routing Fabrics • Banyan Network • constructed from simple 2 x 2 switching elements • self-routing header attached to each packet • elements arranged to route based on this header • no collisions if input packets sorted into ascending order • complexity: n log2n CS 461

  9. Self-Routing Fabrics (cont) • Batcher Network • switching elements sort two numbers • some elements sort into ascending (clear) • some elements sort into descending (shaded) • elements arranged to implement merge sort • complexity: n log22n • Common Design: Batcher-Banyan Switch CS 461

  10. High-Speed IP Router • Switch (possibly ATM) • Line Cards + Forwarding Engines • link interface • router lookup (input) • common IP path (input) • packet queue (output) • Network Processor • routing protocol(s) • exceptional cases CS 461

  11. Routing software w/ router OS Line card (forwarding buffering) Routing CPU Buffer memory Line card (forwarding buffering) Line card (forwarding buffering) Line card (forwarding buffering) High-Speed Router CS 461

  12. PC PC PC PC PC PC NI with uP NI with uP NI with uP NI with uP NI with uP NI with uP CPU CPU CPU CPU CPU CPU . . . . . . . . . . . . . . . . . . MEM MEM MEM MEM MEM MEM NI with uP NI with uP NI with uP NI with uP NI with uP NI with uP Alternative Design Crossbar Switch CS 461

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