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Implementation of neuronetwork system on FPGA (characterization presentation) supervisor: Karina Odinaev. Vyacheslav Yushin Igor Derzhavets Winter 2007. Project definition. Goal: create FPGA based system for string/pattern matching with high code optimization for FPGA structure.
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Implementation of neuronetwork system on FPGA(characterization presentation)supervisor: Karina Odinaev Vyacheslav Yushin Igor Derzhavets Winter 2007
Project definition. • Goal: create FPGA based system for string/pattern matching with high code optimization for FPGA structure. • The system will have 3 main hardware elements: • XUPV2P FPGA board. • DLP-USB245M USB Adapter • PC with USB port.
Data Flow Definition • Running special API with testing file as one of the arguments. • The structure of input file is strings of different length. • API will inject the string to the FPGA through the USB adapter. • FPGA will process the data and update the status bit according to processing result. • Status bit from FPGA will be transferred through the USB adapter to API. • API will write the status to the output file
Data Flow Definition (cont.) input file API output file API
FPGA processing. • FPGA programmed according previous project with small tunings of result calculation, allowed by modular design. • FPGA will be synchronized with input device (no dummy clocks allowed) .
Neuron network processing way. • The algorithm of networks processing based on the CLA (constructive learning algorithm) • Reference: http://ieeexplore.ieee.org/iel2/3013/8556/00374191.pdf?arnumber=374191 and http://citeseer.ist.psu.edu/16290.html
Timelines • 27/11/06 - VHDL code ready. • 1/12/06 - Finish API code writing. • 5/12/06 - synthesize the whole project and debug the API -> FPGA input interface. • 10/12/06 – finish debug whole project. • 15/12/06 – make placement optimization (if possible) and run full benchmark for performance validation.
BACKUP Input file data Board: http://www.xilinx.com/univ/xupv2p.html USB adapter