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William Stallings Computer Organization and Architecture 7 th Edition

William Stallings Computer Organization and Architecture 7 th Edition. Chapter 9 Computer Arithmetic. Arithmetic & Logic Unit. Does the calculations Everything else in the computer is there to service this unit Handles integers May handle floating point (real) numbers

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William Stallings Computer Organization and Architecture 7 th Edition

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  1. William Stallings Computer Organization and Architecture7th Edition Chapter 9 Computer Arithmetic

  2. Arithmetic & Logic Unit • Does the calculations • Everything else in the computer is there to service this unit • Handles integers • May handle floating point (real) numbers • May be separate FPU (maths co-processor) • May be on chip separate FPU (486DX +)

  3. ALU Inputs and Outputs

  4. Integer Representation • Only have 0 & 1 to represent everything • Positive numbers stored in binary • e.g. 41=00101001 • No minus sign, No period • Nonnegative Integers • Unsigned Integer • Sign-Magnitude • Two’s complement 128 64 32 16 8 4 2 1 0 1 0 1 1 0 0 1 89 =

  5. Sign-Magnitude • Left most bit is sign bit • 0 means positive • 1 means negative • +18 = 00010010 • -18 = 10010010 • Problems • Need to consider both sign and magnitude in arithmetic • Two representations of zero (+0 and -0)

  6. Two’s Complement • +3 = 00000011 • +2 = 00000010 • +1 = 00000001 • +0 = 00000000 • -1 = 11111111 • -2 = 11111110 • -3 = 11111101

  7. Benefits • One representation of zero • Arithmetic works easily (see later) • Negating is fairly easy • 3 = 00000011 • Boolean complement gives 11111100 • Add 1 to LSB 11111101

  8. Two’s Complement

  9. Geometric Depiction of Twos Complement Integers

  10. Negation Special Case 1 • 0 = 00000000 • Bitwise not 11111111 • Add 1 to LSB +1 • Result 1 00000000 • Overflow is ignored, so: • - 0 = 0 

  11. Negation Special Case 2 • -128 = 10000000 • bitwise not 01111111 • Add 1 to LSB +1 • Result 10000000 • So: • -(-128) = -128 X • Monitor MSB (sign bit) • It should change during negation

  12. Range of Numbers • 8 bit 2s complement • +127 = 01111111 = 27 -1 • -128 = 10000000 = -27 • 16 bit 2s complement • +32767 = 011111111 11111111 = 215 - 1 • -32768 = 100000000 00000000 = -215 -2n-1 ~ 2n-1-1

  13. Conversion Between Lengths • Positive number pack with leading zeros • +18 = 00010010 • +18 = 00000000 00010010 • Negative numbers pack with leading ones • -18 = 11101110 • -18 = 11111111 11101110 • i.e. pack with MSB (sign bit)

  14. Bias: 2k-1-1 or Excess 2k-1-1

  15. Excess-127 (Bias 127) • k = 8, 2k-1-1 = 28-1-1 = 127 • 8 bits: 0 ~255  -127 ~ 128 • Decimal to Binary 35 -68 35+127 = 162 -68+127 = 59 Excess-127: 10100010 Excess-127: 00111001 • Binary to Decimal Excess-127: 11000101 Excess-127: 00101110 193 46 193-127 = 66 46-127 = -81

  16. Addition and Subtraction • Normal binary addition • Monitor sign bit for overflow • Overflow Rule: • If two numbers are added, and there are both positive or both negative, then overflow occurs if and only if the result has the opposite sign. • Take twos complement of subtrahend and add to minuend • i.e. a - b = a + (-b) • So we only need addition and complement circuits (減數 ) (被減數)

  17. M - S

  18. Full Adder See Figure B.22

  19. 4-bit Adder

  20. Hardware for Addition and Subtraction

  21. Multiplication • Complex • Work out partial product for each digit • Take care with place value (column) • Add partial products

  22. Unsigned Binary Multiplication (1011) (1101)

  23. Execution of Example

  24. Flowchart for Unsigned Binary Multiplication

  25. Multiplying Negative Numbers • This does not work! • Solution 1 • Convert to positive if required • Multiply as above • If signs were different, negate answer • Solution 2 • Booth’s algorithm

  26. Principle of Booth’s Algorithm 01000000 = 00111111 + 1 = 00111000 + 00000111+1 = 00111000 + 00001000-1+1 = 00111000 + 00001000 00111000 = 01000000 - 00001000  2n+1 = (2n+ 2n-1 …+ 2n-k + 2n-k-1 + 2n-k-2 +…+1)+1  2n+ 2n-1 + …+ 2n-k = 2n+1 – (2n-k-1 + 2n-k-2 …+1) – 1 = 2n+1 – (2n-k – 1) – 1 = 2n+1 – 2n-k M  (00011110) = M  (24+23+22+21) = M  (16+8+4+2) = M  (30) = M  (32-2) = M  (25-21) = M25- M21

  27. Booth’s Algorithm M Q-1 A Q Q0

  28. Example of Booth’s Algorithm 7  3

  29. Arithmetic Shift • Arithmetic Right Shift • Arithmetic Left Shift 00011010  00001101 10100100  11010010 01010011  00100110 10101010  11010100

  30. Negative Multiplier X = [1xn-2xn-3…x1x0] X = -2n-1 + (xn-22n-2)+(xn-32n-3 )+…+ (x121 )+ (x020 ) X = [111…10xk-1xk-2…x1x0] X = 2n-1 + 2n-2 +…+2k+1 +(xk-12k-1 )+…+ (x020 ) = 2n-1 + (2n-1  2k+1) +(xk-12k-1 )+…+ (x020 ) = 2k+1 +(xk-12k-1 )+…+ (x020 ) 10000000 11000000 11100000 11110000 = -27 = -27+26 = -26 = -26+25 = -25 = -25+24 = -24 11111000 11111100 11111110 11111111 = -23 = -22 = -21 = -20 76543210

  31. Division • More complex than multiplication • Negative numbers are really bad! • Based on long division (長除法)

  32. Division of Unsigned Binary Integers

  33. Flowchart for Unsigned Binary Division M A Q Q0

  34. Real Numbers • Numbers with fractions • Could be done in pure binary • 1001.1010 = 24 + 20 +2-1 + 2-3=9.625 • Where is the binary point? • Fixed? • Very limited • Moving? • How do you show where it is?

  35. Floating Point • +/- .significandx 2exponent • Point is actually fixed between sign bit and body of mantissa(尾數) • Exponent indicates place value (point position) (mantissa) Biased representation:

  36. Floating Point Examples 8-bit biased value: 28-1-1 = 27-1 = 127 (01111111) 00010100 + 01111111 = 10010011 00010100 + 01111111 = 01101011

  37. Signs for Floating Point • Mantissa is stored in 2s complement • Exponent is in excess or biased notation • e.g. Excess (bias) 127 means • 8 bit exponent field • Pure value range 0-255 • Subtract 127 to get correct value • Range -127 to +128

  38. (0.4375)10 = (x)2 0.4375 × 2 0.875 × 2 1.75 × 2 1.5 × 2 1.0 x = 0.0111

  39. Normalization • FP numbers are usually normalized • i.e. exponent is adjusted so that leading bit (MSB) of mantissa is 1 • Since it is always 1 there is no need to store it • (c.f. Scientific notation where numbers are normalized to give a single digit before the decimal point • e.g. 3.123 x 103) ±1.bbb…b ×2±E

  40. FP Ranges • For a 32 bit number • 2s Complement: -231 ~ 231-1 • Floating number • Negative numbers: -(2-2-23) x 2128 ~ -2-127 • Positive numbers: 2-127 ~ (2-2-23) x 2128 • Accuracy • The effect of changing LSB of mantissa • 23 bit mantissa 2-23 1.2 x 10-7 • About 6 decimal places

  41. Expressible Numbers

  42. Density of Floating Point Numbers

  43. IEEE 754 • Standard for floating point storage • 32 and 64 bit standards • 8 and 11 bit exponent respectively • Extended formats (both mantissa and exponent) for intermediate results

  44. IEEE 754 Formats

  45. Page 313 (11111110) (00000001)

  46. FP Arithmetic +/- Four basic phases: • Check for zeros • Align significands (adjusting exponents) • Add or subtract significands • Normalize result

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