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Smart Phone/PMP Application for Simultaneous Display on Panel and TV

This application supports simultaneous display on the panel and TV, without the need to change the SOC pixel clock. It offers flexible up and down scaling on the display and supports NTSC and PAL formats. The CH7024B features programmable 24-bit/18-bit/16-bit/15-bit/12-bit/8-bit digital input interface, adjustable brightness, contrast, hue, and saturation, and programmable power management.

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Smart Phone/PMP Application for Simultaneous Display on Panel and TV

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  1. 220x176 Smart Phone /PMP Application 320x240 240x320 8~24 Bits H Sync. SOC V Sync. Pixel CLK (Fixed 2.3~64MHz) 640x480 Simultaneously display Panel and TV CH7024B NTSC/PAL CVBS S-Video PLL 1 PLL 2 I2C

  2. CAR GPS/DVD Application Digital RGB 8~24 Bits Analog RGB 480x234 CH7013B R G B H Sync. SOC H Sync. V Sync. V Sync. Pixel CLK (CLK Range 2.3~64MHz) Simultaneously display Panel and TV NTSC/PAL CH7024B CVBS S-Video PLL 1 PLL 2 I2C

  3. NO Program Pixel CLK any more

  4. CH7024B Features Lists • TV encoder targeting handheld and similar systems • Support for NTSC and PAL • Macrovision 7.1 L1 copy protection support for SDTV • Programmable 24-bit/18-bit/16-bit/15-bit/12-bit/8bit digital input interface supporting various RGB and YCrCb (eg. RGB565, RGB666, RGB888, ITU656 like YCrCb, etc.) • Adjustable brightness, contrast, hue and satuation • TV/Monitor connection detect – auto shut off DAC if not connected • Programmable power management • Two high quality 10-bit video DAC outputs • Fully programmable through serial port • Offered in 48-pin LQFP and 49-pin BGA package • Flexible up and down scaling on the display • Flexible pixel clock frequency from graphics controller (2.3MHz – 64MHz) • Master and slave mode • IO voltage and SPC/SPD from 1.2V to 3.3V • Power down current – 10uA typical • Typical power consumption < 300mW (or < 200mW for CVBS only mode)

  5. CH7024B Block Diagram

  6. // Ch7024B related Timiing NTSC PAL 240x320 5.77778MHZ 240x320 5.77778MHZ HT 0XFB HT 0X10E HA 0XF0 HA 0XF0 HSO 0X04 HSO 0X04 HSP 0X02 HSP 0X02 VT 0X180 VT 0X1AC VA 0X140 VA 0X140 VSO 0X04 VSO 0X04 VSP 0X03 VSP 0X03 320X240 5.77778MHZ 320X240 5.77778MHZ HT 0X180 HT 0X1AC HA 0X140 HA 0X140 HSO 0X04 HSO 0X04 HSP 0X02 HSP 0X02 VT 0XFB VT 0X10E VA 0XF0 VA 0XF0 VSO 0X04 VSO 0X04 VSP 0X03 VSP 0X03 640X480 20.8MHz 640X480 20.8MHz HT 0X2B6 HT 0X340 HA 0X280 HA 0X380 HSO 0X04 HSO 0X04 HSP 0X02 HSP 0X02 VT 0X1F4 VT 0X1F4 VA 0X1E0 VA 0X1E0 VSO 0X04 VSO 0X04 VSP 0X03 VSP 0X03

  7. CH7024B Advantages • Simultaneously display Panel and TV • Don’t need to change SOC pixel clock while TV spec. out • No share SOC loading and side effect with 2 independent PLL • Flexible up and down scaling on the display • Don’t need frame buffer between SOC and CH7024B • Provided programming sample codes for recommended modes.  • It supports 220X176, 320X240, 240X320, 640X480 in RGB656, • NTSC and PAL format through I2C

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