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IXP1200 Microengines

IXP1200 Microengines. Apparao Kodavanti Srinivasa Guntupalli. Network Processor. IXP 1200 is a network processor that is optimized for networking and communication applications Has one StrongARM Core micro processor and six independent microengines. All the processors are RISC based

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IXP1200 Microengines

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  1. IXP1200 Microengines Apparao Kodavanti Srinivasa Guntupalli

  2. Network Processor • IXP 1200 is a network processor that is optimized for networking and communication applications • Has one StrongARM Core micro processor and six independent microengines. • All the processors are RISC based • C compiler and Tornado IDE for programming the StrongARM processor • Intel SDK which has a developers’ workbench for programming the microengines

  3. Microengines - Architecture • The six microengines each provide the following features • Hardware multithreaded support for four contexts – context switching is non preemptive • Can hold 1024 instructions in the instruction control store • Five stage pipeline enables 1 clock cycle per instruction when fully loaded

  4. Microengine - architecture • 128 32-bit GPRs general purpose registers • 128 32-bit transfer registers – used to transfer data from and to memory • Separate registers allow multithreading

  5. Memory Hierarchy • 3 different memory interfaces • Scratchpad 4k bytes 12-14 cycles latency • SRAM 8MB 16-20 cycles • SDRAM 256 MB 33-40 cycles • Min addressable unit – 4 bytes for scratchpad and SRAM , 8 bytes for SDRAM

  6. Microengine - Software • Programming Language- Microcode assembler • IXP1200 SDK has Developer’s workbench – consists of simulator, assembler , linker and debugger • Software libraries called IXP Blocks – ex- the checksum for an IP header can be calculated by using a IXP block

  7. Assembler instructions • ALU , rotate and shift instructions • Branch and Jump instructions • Immediate and Load • Reference instructions – memory and hardware interfaces • Miscellaneous – hash, context switch and NOP

  8. A Microcode example • Perform an endian swap on a longword, reverse the order of bytes. Used to convert big endian network bytes to little endian bytes used by IXP

  9. Example code • alu_shf[rswap,0,B,rbuf, <<rot8] • Byte1 byte2 byte3 byte0 • ld_field[rswap,1010,rbuf,<<rot24] • Byte3 byte2 byte1 byte0

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