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741 Op-Amp. Where we are going:. Typical CMOS Amplifier. -6. 10. -7. 10. -8. 10. Drain current (A). -9. 10. k = 0.58680 I o = 1.2104fA. -10. 10. nFET. pFET. S. D. -11. 10. 0.4. 0.45. 0.5. 0.55. 0.6. 0.65. 0.7. 0.75. 0.8. 0.85. 0.9. Gate voltage (V). G. G. B.
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741 Op-Amp Where we are going:
-6 10 -7 10 -8 10 Drain current (A) -9 10 k = 0.58680 Io = 1.2104fA -10 10 nFET pFET S D -11 10 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 Gate voltage (V) G G B D S Subthreshold MOSFETs In linear scale, we have a quadratic dependence In log-scale, we have an exponential dependence
( ) ( ) ( ) k - k - V V / u V V / u = - I I e e g S T g d T 0 MOSFET Current-Voltage Curves ( ) - - = - / / kV u V u / V u I I e e e G T S T D T 0 DS ( ) ( ) ( ) k - V V / u - - = - V V / u I e 1 e g S T d S T 0 ( ) - - = - ( ) / / kV V u V u I e 1 e G S T ds T 0 > V 4 U - = ( ) / kV V u I e ds T G S T 0 Saturation
Iout Current Sink Vout Vb M5 GND Vdd Current Source V1 M6 Iout Current Sources Ever wonder how we make one of these? How “good” a current source?
GND Current versus Drain Voltage Not flat due to Early effect (channel length modulation) Id = Id(sat) (1 + (Vd/VA) ) Ic = Ic(sat) (1 + (Vc/VA) ) Iout or Id = Id(sat) eVd/VA Rout 10mA Ic = Ic(sat) eVc/VA
Iout Iin Vdd Vdd Vout Vb Vb M4 M7 Mb M5 Iout GND GND Iin Current Mirrors nFET Current Mirror pFET Current Mirror Iout = ( (W/L)5 / (W/L)b) Iin Iout = ( (W/L)7 / (W/L)4) Iin A good way to generate a bias current
Current Mirror Iout1 Iout2 Iout3 Iin Vout1 Vout2 Vout3 Vb Mb M5 M6 M7 GND GND GND GND Iout / Iin = ( (W/L)7 / (W/L)b) Iout / Iin = ( (W/L)6 / (W/L)b) Iout = ( (W/L)5 / (W/L)b) Iin
GND GND GND Diode-Capacitor Dynamics Iin Iout C (dVi/dt) = Iin - Ico exp(Vi/UT) Iout = Ico exp(Vi/UT) Vi C (C / Iout) (d Iout /dt) = Iin - Iout C (d Iout /dt) = Iout( Iin - Iout )
Basic One-Transistor Circuits Common Source Common Gate Source Follower Common Emitter Common Base Emitter Follower The fundamental two-transisor circuit: Differential Pair
Vdd Vdd GND Multiple Transistor Configurations Vdd 100pA 500mA 10mA Vout Vout Vout Vin Vin Vin GND GND Subthreshold MOS Above threshold MOS BJT JFETs as well….
Above Threshold MOSFET Equations I = (K/2k) ( (k(Vg - VT) - Vs)2 - (k(Vg - VT ) - Vd) 2 ) If k = 1 (ignoring back-gate effects): I = (K/2) ( 2(Vgs - VT) Vds - Vds2 ) Saturation: Qd = 0 I = (K/2k) ( (k(Vg - VT) - Vs)2
-2 10 -3 10 -4 10 Gummel Plots -5 Ic: n=1, Is = 5.52fA 10 -6 10 Currents -7 10 -8 10 -9 10 Ib: n=1.019, Is = 0.048fA -10 10 -11 10 -12 10 0.1 0.2 0.3 0.4 0.5 0.6 0.7 Base-Emitter Voltage (V)
V3 + V - V1 rp gmV ro V2 V2 Small-Signal Modeling V3 V3 I I V1 V1 V2 V2 rp gm ro Av BJT (UTb) / I I / UT VA / I VA / UT Above VT MOSFET 2I /(V1-V2 -VT) VA / I 2VA/(V1-V2 -VT) Sub VT MOSFET kI / UT VA / I kVA / UT
Signal Flow in Transistors • Rules of Thumb • The collector or drain can never be an input terminal. • The base or gate can never be an output terminal. • In addition it is important to note polarity reversals on these signal paths. • The base-collector or gate-drain path inverts. • All other paths are noninverting. • (This of course assumes that there are no reactive elements causing phase shifts) (Never is too strong a word)
Vdd Vdd Vdd GND GND GND Spectrum of Amplifier “Loads” 10mA R1 Vb Vout Vout Vout Vin Vin Vin Ideal Current Source Load Transistor Current Source Load Resistive Load Remember: On-chip resistors are expensive
Vdd GND Basic One-Transistor Circuits Source Follower or Emitter Follower Buffers (Isolates) the input to (from) the output Assuming an ideal current source: Vin Ibias = Ieo e(Vin -Vout )/UT Vout Vout = -UT ln(Ibias/Ieo) + Vin 100mA Ibias = Ibias e(DVin -DVout )/UT D Vout = D Vin
If we use a transistor as a current source: Id = Ibias eVout/VA = Io ekVin/UT e-Vout/UT Vout = UT ln(Ibias/Io) + (k // (VA/UT))Vin Basic One-Transistor Circuits Assuming an ideal current source: Vdd Ibias = Io ekVin/UT e-Vout/UT Vin Vout Vout = UT ln(Ibias/Io) + k Vin 10nA Ibias = Ibias ekDVin/UT e-DVout/UT GND D Vout = kD Vin
Why do this? Vout • Higher Linearity • Possible Stability Vin Circuit Element Why not do this? gm GND GND • Lower Bandwidth • Higher Noise / Df Source Degeneration Vout Vin
GND GND Source Degeneration Vout Neglect VA of Q1 and assume matched devices: Vout I Vin I = Ieo e V1 /UT = Ieo e(Vin - V1 + Vout/Av )/UT Vin V1 2 V1 = Vin + Vout / Av Q1 I = Ieo e(Vin + Vout/Av )/(2 UT) A similar result for MOSFETs