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TEXPO 2010

TEXPO 2010. High-Speed Test Channels for Die Level Testing. N. Kandalaft, T.M. Supon, R. Rashidzadeh, M. Ahmadi, Department of Electrical and Computer Engineering University of Windsor , Windsor, ON, Canada. An effective solution is to reduce the length of the signal paths.

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TEXPO 2010

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  1. TEXPO 2010 High-Speed Test Channels for Die Level Testing • N. Kandalaft, T.M. Supon, R. Rashidzadeh, M. Ahmadi, • Department of Electrical and Computer Engineering University of Windsor, • Windsor, ON, Canada An effective solution is to reduce the length of the signal paths Fixed MEMS Socket y Abstract The design of Device Interface Board (DIB) for testing high-speed integrated circuits is a major challenge. Performance degradation of the DIB at high frequency range increases the yield loss and the cost of manufacturing. A new DIB architecture based on MEMS technology is proposed to establish high speed connectivity between the Device Under Test (DUT) and the tester at the die level. Simulation results shows that the proposed architecture maintains the signal integrity up to 50 GHzwithout much loss or distortion. • The undesired effects of long wire traces on the signal integrity are significantly attenuated with the reduction of their lengths. • A MEMS based DIB lowers the distance between the DUT and the ATE pogo pads by orders of magnitude due to its micro scale dimensions. Why MEMS DIB ? 60 μm MEMS Pogo Pad Pressure Mass Die Under Test • Distributed Trace • Parameters (b) (a) Die Under Test Metal I/O Pad Device Interface Board Contact Spring Contact Spring Pad Support Beams • Provides temporary electrical interface between the • tester and the DUT. • Provides space for DUT specific local circuitry. Cross section of a contact spring and the die under test (a) before applying pressure (b) under pressure providing a temporary connection. Simulation Results Teradyne J873 DIB Typical Test Board • Signal Paths on a Typical DIB Encounter • Discontinuities: • Impedance matching. • Contact resistance. • Transmission line effects: • Parasitic capacitances. • Parasitic inductances. • AC resistance due to the skin effect. Architecture of the proposed MEMS based DIB includes a fixed and a removable MEMS sockets • A typical strip-line or Coax cable of 8 cm-long heavily attenuates the input signal. • -3dB bandwidth of the MEMS DIB lies at 50GHz which is significantly higher than the bandwidth of currently used DIBs. Removable MEMS Socket 3000 μm Contact Spring at steady state 3000 μm Conclusion Current Problems • With the transit frequency of available CMOS technologies exceeding 200 GHz, it is clear now that the ability to deliver high frequency signals to external testers without much loss and distortion becomes a monumental task in the near future. • A MEMS DIB provides high-speed signal paths between the ATE resources and the die under test without affecting the test signal integrity. • It provides a place for interface circuit to enhance the electrical performance of the tester during critical tests. • At gigahertz frequency range the effects of transmission lines and discontinuities becomes a critical issue affecting the signal integrity and the test results. • High distortion. • Noise. • Signal reflection. • Cross-talk. • Electromagnetic coupling. 100μm Contact Spring under pressure N. Kandalaft, University of Windsor, Windsor, ON, Canada

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