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Machine-Independent Virtual Memory Management for Paged Uniprocessor and Multiprocessor Architectures. By: Richard Rashid, Avadis Tevanian, Michael Young, David Golub, Robert Baronn, David Black, William Bolosky, and Jonathan Chew, October 1987. Presented By: Oindrila Mukherjee. Agenda.
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Machine-Independent Virtual Memory Management for Paged Uniprocessor and Multiprocessor Architectures By:Richard Rashid, Avadis Tevanian, Michael Young, David Golub, Robert Baronn, David Black, William Bolosky, and Jonathan Chew, October 1987 Presented By: Oindrila Mukherjee
Agenda • Why Mach? • Mach Background • Mach Features • Mach Design • Mach Abstractions • Basic VM Operations • Mach VM Implementation • Data Structures • Sharing Memory • Machine-Independent/Machine-Dependent Interface • VM Performance • Conclusions
Why Mach ? Mach allows • Portability • User processes to perform OS functionality like paging • Existing versions offer little improvement for VMM other than simple paging support. • Use a memory management system that is readily portable to multiprocessor as well as uniprocessor computing engines.
Mach Background • Mach currently runs on • the entire VAX family of uniprocessor and multiprocessor systems • IBM PC RT • SUN 3 • Encore Multimax • Sequential Balance 21000 • Machine dependent code of VMM reduced to single module and related header file.
Mach Features • Compatible with UNIX 4.3BSD • The Mach System supports: • Virtual address spaces • Copy-on-write virtual copy operations • Copy-on-write and read-write memory sharing between tasks • Memory-mapped files • User provided backing store objects and pagers
Mach Design - Abstractions Five Basic Mach Abstractions • Task • Thread • Port • Message • Memory Object
Mach Design - Basic VM Operations • Tasks have large, sparse virtual address spaces. • A task can • allocate/deallocate virtual memory. • set protection status (current, maximum). • specify inheritance (shared, copy, none). • create and manage memory objects. • Copy-on-write and read/write sharing of memory are permitted between tasks. • Paging operations performed directly by user-state tasks.
Mach VM Implementation – Data Structures • Machine-Independent Section • Resident Page Table • Address Map • Memory Object • Machine-Dependent Section • Pmap - Hardware-defined physical address map.
Machine-Independent Section - Resident Page Table • Basically an inverted page table. • Entries store information on physical pages. • Each page entry may be simultaneously linked into a memory object list, a memory allocation queue and an object/offset hash bucket • Page size is a boot time system parameter. Object 1 -> Pg.Entries 1, 4, 10 Pg.No. 1 2 1 4 10 4 . . Memory Object List 10
Machine-Independent Section - Address Map • Entries map a contiguous range of virtual addresses onto a contiguous area of a memory object • Maintained as a sorted doubly linked list • Carries inheritance and protection attributes information. • Efficiently implements page fault lookups, copy/protection on address ranges and allocation/deallocation of address ranges. • Small in size
Machine-Independent Section - Memory Objects • Data repository, indexed by byte, upon which various operations can be performed. • Reference counter per object. • Pager handles page faults and page-out requests outside kernel. • Paging_object port allows access to the pager. • Paging_name for every object maintained by the kernel • Paging_object_request port used by pager to send messages to the kernel.
Handling Page Faults Address Map Memory Obj Mgr B Obj2 Obj1 Port Memory Obj Mgr A 3.Look for Memory Obj. mapping Obj3 4. Send msg to fetch page and Memory obj mgr fetches page from disk 2. Pg fault • Search • for Page Kernel Resident Page Table 5. Update resident page table 6. Update TLB
Sharing Memory Task Address A Task Address B • Two address maps pointing to the same memory object. • Copy-on-write memory management – kernel needs information about modified pages. • Mach uses shadow objects. • Sharing Maps Sharing Map Memory Objects
Machine-Independent/Machine-Dependent Interface • Mach’s machine-dependent code responsible for • Pmap management • Implementing page level operations on pmaps • Ensuring appropriate hardware map is operational • Pmap module need not keep track of all currently valid mappings. • Pmap may delay operations that reduce protection on range of addresses. • Implementer of pmap needs to know very little about the way Mach functions.
VM Performance • Implemented on VAX architecture • MicroVAX II 11/780 and VAX 11/784 • Advantages achieved with little or no effect on performance.
Conclusion • Mach provides sophisticated VM features without being tied to a specific hardware base. • VM mechanisms can be used either within a multiprocessor or extended into a distributed environment. • Separation of machine dependent and independent code improves performance.