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James A. Walker, Richard Sinnott, James A. Hilder, Gordon Stewart and Andy M. Tyrrell

Optimised Generation of Electronic Standard Cell Libraries with Variability Tolerance through the nanoCMOS Grid. James A. Walker, Richard Sinnott, James A. Hilder, Gordon Stewart and Andy M. Tyrrell. Intelligent Systems Group, Department of Electronics, University of York, UK

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James A. Walker, Richard Sinnott, James A. Hilder, Gordon Stewart and Andy M. Tyrrell

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  1. Optimised Generation of Electronic Standard Cell Libraries with Variability Tolerance through the nanoCMOS Grid James A. Walker, Richard Sinnott, James A. Hilder, Gordon Stewart and Andy M. Tyrrell Intelligent Systems Group, Department of Electronics, University of York, UK {jaw500,jah128,amt}@ohm.york.ac.uk National e-Science Centre, University of Glasgow, UK {r.sinnot,g.stewart}@nesc.gla.ac.uk

  2. The Nano-CMOS Project • EPSRC-funded project • 5 UK Universities • 11 RAs • 7 Science • 4 e-Science • 7 PhDs

  3. The simulation paradigm now 22 nm MOSFETs in production 2009 4.2 nm MOSFETs in production 2023 The Nano-CMOS Project

  4. Current Aim • Optimise designs from a commercial Standard Cell Library to: • Reduce the effects of intrinsic variability • Improve performance • e.g. delay, power

  5. Introducing MOTIVATED... MOTIVATED Multi Objective Toolkit for Intrinsic Variation Aware Transistor-level Evolutionary Design

  6. *RANDOMSPICE NETLIST MN1 0 2 3 3 ATOMN W=.35U MP1 1 0 2 1 ATOMP W=.7U MN2 1 4 3 3 ATOMN W=.7U *NGSPICE NETLIST 1 MN1 0 2 3 3 NMOS96 W=.35U MP1 1 0 2 1 PMOS32 W=.7U MN2 1 4 3 3 NMOS6 W=.7U *NGSPICE NETLIST 2 MN1 0 2 3 3 NMOS43 W=.35U MP1 1 0 2 1 PMOS64 W=.7U MN2 1 4 3 3 NMOS12 W=.7U *NGSPICE NETLIST 3 MN1 0 2 3 3 NMOS52 W=.35U MP1 1 0 2 1 PMOS21 W=.7U MN2 1 4 3 3 NMOS69 W=.7U *NGSPICE NETLIST 4 MN1 0 2 3 3 NMOS52 W=.35U MP1 1 0 2 1 PMOS21 W=.7U MN2 1 4 3 3 NMOS69 W=.7U *NGSPICE NETLIST 5 MN1 0 2 3 3 NMOS52 W=.35U MP1 1 0 2 1 PMOS21 W=.7U MN2 1 4 3 3 NMOS69 W=.7U NGSPICE Build 17.6: Loading NETLIST_1_5.CIR 17 nodes parsed 0 1.454 2.053 0.000 0.001 1 1.521 1.981 0.000 0.003 2 1.525 1.983 0.000 0.006 NGSPICE Build 17.6: Loading NETLIST_1_5.CIR 17 nodes parsed 0 1.454 2.053 0.000 0.001 1 1.521 1.981 0.000 0.003 2 1.525 1.983 0.000 0.006 NGSPICE Build 17.6: Loading NETLIST_1_5.CIR 17 nodes parsed 0 1.454 2.053 0.000 0.001 1 1.521 1.981 0.000 0.003 2 1.525 1.983 0.000 0.006 NGSPICE Build 17.6: Loading NETLIST_1_5.CIR 17 nodes parsed 0 1.454 2.053 0.000 0.001 1 1.521 1.981 0.000 0.003 2 1.525 1.983 0.000 0.006 NGSPICE Build 17.6: Loading NETLIST_1_5.CIR 17 nodes parsed 0 1.454 2.053 0.000 0.001 1 1.521 1.981 0.000 0.003 2 1.525 1.983 0.000 0.006 Evolutionary Loop Initial Random Population Convert genotypes to netlists Run randomspice Mutate new population Run ngspice Select parents and recombine Calculate fitness

  7. Original Methodology • Two-stage process: • Optimise design using uniform models • Evaluate results from stage 1 using variability-enhanced models • Use of variability-enhanced models throughout would take too long • SPICE evaluation accounts for c. 99% of CPU time

  8. ExploitingGridResources • Run EA part on local machine and evaluations on grid resources • Parallelises ~ 99% of our computing time Glasgow Manchester Run on Nano-CMOS Grid Run on local machine Maven ECDF NGS

  9. ExploitingGridResources • Variability-enhanced models are used throughout: • Simplified design process • Able to run increased number of SPICE simulations: • Improved accuracy, reliability and trustworthiness of results • Results stored on secure distributed file system and in meta-data service: • Simplified dissemination of results to collaborators

  10. Test Bench

  11. Brute Force Optimised Inverter

  12. Brute Force Optimised Inverter

  13. Motivated Optimised NAND

  14. Motivated Optimised OR

  15. Motivated Optimised Buffer

  16. Motivated Optimised XOR

  17. Any Questions?

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