1 / 18

Exam #1 Review

Exam #1 Review. Dr. Holbert February 18, 2008. Basic Circuit Analysis Methods. While Obeying Passive Sign Convention Ohm’s Law; KCL; KVL Voltage and Current Division Series/Parallel Resistance combinations. I. Circuit Element. –. +. Default Sign Convention.

marika
Download Presentation

Exam #1 Review

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Exam #1 Review Dr. Holbert February 18, 2008 EEE 202

  2. Basic Circuit Analysis Methods • While Obeying Passive Sign Convention • Ohm’s Law; KCL; KVL • Voltage and Current Division • Series/Parallel Resistance combinations EEE 202

  3. I Circuit Element – + Default Sign Convention • Passive sign convention : current should enter the positive voltage terminal • Consequence for P = I V • Positive (+) Power: element absorbs power • Negative (-) Power: element supplies power EEE 202

  4. Ohm’s Law V = I R I + The Rest of the Circuit R V – EEE 202

  5. i1(t) i5(t) i2(t) i4(t) i3(t) KCL (Kirchhoff’s Current Law) The sum of currents entering the node is zero: Analogy: mass flow at pipe junction EEE 202

  6. KVL (Kirchhoff’s Voltage Law) The sum of voltages around a loop is zero: Analogy: pressure drop through pipe loop + – + v2(t) + – v1(t) v3(t) – EEE 202

  7. KVL Polarity • A loop is any closed path through a circuit in which no node is encountered more than once • Voltage Polarity Convention • A voltage encountered + to – is positive • A voltage encountered – to + is negative EEE 202

  8. In General: Voltage Division • Consider N resistors in series: • Source voltage(s) are divided between the resistors in direct proportion to their resistances EEE 202

  9. In General: Current Division • Consider N resistors in parallel: • Special Case (2 resistors in parallel) EEE 202

  10. Equivalent Impedance • If we wish to replace two parallel resistances with a single resistor whose voltage-current relationship is the same, the equivalent resistance has a value of: • Parallel elements share the same two (distinct) end nodes EEE 202

  11. V1 V2 R Steps of Nodal Analysis 1. Choose a reference (ground) node, V=0. 2. Assign node voltages to the other nodes. 3. Apply KCL to each node but the reference node; express currents in terms of node voltages. • Solve the resulting system of linear equations for the nodal voltages. EEE 202

  12. I2 VR + – R I1 VR = (I1 –I2 ) R Steps of Mesh/Loop Analysis 1. Identify mesh (loops). 2. Assign a current to each mesh. 3. Apply KVL around each loop to get an equation in terms of the loop currents. • Solve the resulting system of linear equations for the mesh/loop currents. EEE 202

  13. Nodal Analysis Recipe 1&2) Identify and label N nodal voltages plus the ground node (V=0) 3) Apply KCL at N nodes (supernode makes constraint eq.) 4) Solve for the nodal voltages Loop Analysis Recipe 1&2) Identify and label M mesh currents 3) Apply KVL at the M meshes (a current source makes a constraint equation) 4) Solve for the mesh currents Nodal and Loop Analyses EEE 202

  14. Superposition Procedure • For each independent voltage and current source (repeat the following): • Replace the other independent voltage sources with a short circuit (i.e., V = 0). • Replace the other independent current sources with an open circuit (i.e., I = 0). Note: Dependent sources are not changed! • Calculate the contribution of this particular voltage or current source to the desired output parameter. 2. Algebraically sum the individual contributions (current and/or voltage) from each independent source. EEE 202

  15. Source Transformation A voltage source in series with a resistor is transformed into a current source in parallel with that resistor; and vice versa. Rs + – Vs Is Rs EEE 202

  16. Basic Approach to Finding the Thevenin/Norton Equivalent • Circuits with independent sources: • Find Voc and/or Isc • Compute RTh (= Voc/Isc) • Circuits without independent sources: • Apply a test voltage (current) source • Find resulting current (voltage) • Compute RTh (= Vtest/Itest) EEE 202

  17. RTh + – Voc Isc RTh Thevenin equivalent circuit Norton equivalent circuit Thevenin/Norton Equivalent EEE 202

  18. Generally apply KCL or nodal analysis Ideal Op-Amp Relations i– = 0 = i+ v– = v+ + – Op Amps EEE 202

More Related