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FPGA- Optimised High- Quality Uniform Random Number Generators

Explore innovative method for FPGA-based RNGs with basic primitives & high-quality results. Comparison, calculations, motivations, and claims covered in detail.

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FPGA- Optimised High- Quality Uniform Random Number Generators

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  1. School of Engineering University of Guelph FPGA-Optimised High-QualityUniform RandomNumberGenerators By David Barrie Thomas and Wayne Lukof the Imperial College, London, England -PaperReview- Cédric De Brito

  2. Table of Contents • Introduction • Background • The paper • Explanations • Conclusion

  3. Introduction • This paper describes a new method to create Random Number Generators (RNG) using only the most basic primitives of FPGAs: Flip-Flops (FF), Lookup Tables (LUT), Shift Registers (SR) and Random Access Memory (RAM)

  4. Background Whatis a RNG ? • Two types: • True RNG (TRNG): • Pseudo RNG (PRNG): • Use of physical phenomena, e.g the jitter between oscillators • fundamentally unpredictable • great interest in cryptographic applications • X cannot produce high bit-rate streams • X impossible to repeat a simulation with the same stimuli • depends on initial seed • characteristic functions are deterministic : a given seed must always give rise to the same output sequence • X advances state using a recurrence function • X the state-space must have a fixed cardinality -> must eventually repeat -> Quality ?

  5. Obstacles to FPGA implementation Background • Limited resources • Most algorithms are developed for CPUs ->usually optimized for 32 bits->mostly sequential However • FPGAs are fundamentally binary • Parallel -> huge increase in bit rate

  6. What is currently available Background Paperpublished in 2008 • Most commonly used in software: Mersenne-Twister RNG (MT19937) – adapted to FPGA – runs on an Opteronat2.2GHz for 4Gb/s • Most efficient on an FPGA: LUT recurrence – MAXIMUM area efficiency – no software equivalent

  7. Motivations The paper

  8. Motivations The paper “ Many scientific and industrial problems have no tractable closed-form solution, and can only be solved through Monte- Carlo simulations. However, such simulations require huge amounts of computational power, and the power and size limits of conventional compute-farms have led to significant interest in the use of FPGAs in such applications.”

  9. Claims The paper Compared to the MT19937 at 2.2GHz for a output of 4Gb/s • Less area utilisation • > less power • Low clock frequency : 550 Mhz On a Virtex-5 • High speed generation : 48 Gb/s

  10. Claims The paper • Extremely long periods: ~211213 -1 2 8 , 1 4 1 , 1 2 0 , 1 3 6 , 9 7 3 , 7 3 1 , 3 3 3 , 9 3 1 , 5 2 9 , 7 5 8 , 4 2 6 e + 3 3 4 5 • VHDL description isplatformindependent • By nature, itscriticalpathisobvious • -> caneasilybeadapted/optimized for anyplatform

  11. Basics • A RNG relies on a polynomial of degree n to determine the values of the bits of the next generated number. Explanation Pz = zn - a1zn-1 +…+anz0 • This characteristic polynomial is translated into a characteristic recurrence function Si+1T = [si,5 XOR si,6 , si,6 , si,4 , si,5 , si,2 , si,0 , si,1 ] Active bit FIFO bits

  12. A simple example Explanation Binary Linear Recurrence (BLR) 1) Choose a polynomial of the form Px = x6 + x5 + x0 2) Find its equivalent recurrence function Si+1T = [si,5 XOR si,6 , si,6 , si,1 , si,2 , si,3 , si,4 , si,5 ] 3) Create a matrix to save these coefficients

  13. A simple example Explanation Binary Linear Recurrence (BLR) • Only produces 1 new value per cycle • For a w-length word, w SRs are needed. • Maximum period of 2n-1 instead of 2nw-1

  14. How is the periodcalculated ? Explanation • Why? Because the state-space defining the characteristic polynomial must be finite/bounded -> must eventually repeat • Without too much math, maximum period is 2n-1 if (special but common case) 2n-1 is a Mersenne prime Prime if n in 2n-1is prime

  15. How is the qualitymeasured? Explanation • The quality is a measure of “how random” the numbers produced are. • Test of quality : • RunGeneratortwicewithseveral "batteries" (Diehard, SmallCrush, Alphabit) and bothrunsmustproduceenough values in [10-6 .. 1-10-6] and one in [0.01..0.99] ≠ cryptological randomness -> Empirical randomness

  16. Conclusion • Critical path : I -> FF -> RAM -> FF -> O • Limitation : speed of RAM – NOT logic/routing

  17. Personal Opinion • VERY interesting paper • Condensed but complete • Clear • Can be reproduced • About a rather unusual topic

  18. Questions ?

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