Integrating Ethernet CMS with Internal Verification Environments

Integrating EthernetCMS with Internal Verification Environments Cadence Verification Challenge, Bristol, Mike Bartley, TVS

Overview • Background • The DUT • The verification environments • Experiences • Of integrating verification environments and results • Of OVM scoreboard • Results

The DUT: Blocks from Gnodal Ethernet chip Data Link Layer (Layer 2) Media Access Control Sublayer Physical Coding Sublayer PHY Layer (Layer 1) MAC PCS Blocks from an Ethernet chip from Gnodal

Internal block level verification flow • Use of PSL + IFV • Test bench • SystemC (sequencers and transactors) • PSL assertions in the design • SystemC coverage and assertion checks • SV covergroups and assertions • There are numerous simulator tools/languages • It makes sense to pick the right tool for each job • For example • PSL/SVA and SV covergroups are great for checking internal stuff in the guts of the design, in an unobtrusive way • Whilst e and SC are good for the higher-level test control… • Need to consider re-use too (Gnodal had SystemC chip test bench)

Description of the internal test bench irun stimulus transactor Scoreboard CPU Coverage Coverage Assertions IFV Assertion checks Loopback - Injects clock and lane skew KEY SystemC Verilog PCS System Verilog PSL PSL

Description of the internal test bench irun stimulus transactor Coverage Coverage Assertions Scoreboard CPU IFV Assertion checks transactor stimulus KEY SystemC MAC Verilog System Verilog PSL PSL

Description of the CMS test bench irun eVC incl coverage & assertions PCS OVM e Scoreboard CPU MAC Coverage Assertion checks Loopback - Flow control KEY SystemC Verilog Coverage Assertions System Verilog e

Experiences of using the Ethernet eVC/CMS • Connecting the eVC • Quick and easy • Extensive assertions related to IEEE specification • Extensive coverage targets related to IEEE spec • Comprehensive and easy to adapt to our needs (using VManager) • Tests • Obtained reasonably good coverage out of the box • Easy to add additional tests • Injecting errors where we wanted • Layered approach – but we could only see how to inject errors after packet construction • This made it hard to cover all the state machines which required error injection at specific times/ in specific sequences

OVM e scoreboard : Instance and connect • Define new scoreboard type and declare its ports unit vr_enet_scbd like ovm_scoreboard { scbd_port in_packet: add vr_enet_packet; scbd_port out_packet: match vr_enet_packet; }; • Connect it to the environment monitor/s extend vr_enet_env { scbd : ACTIVE vr_enet_scbd is instance; connect_ports() is also { do_bind ….. } };

OVM scoreboard : Add and match • Customize the packet add and match criteria unit vr_enet_scbd like ovm_scoreboard { in_packet_predict (pkt : vr_enet_packet) is only { -- Add as UNCERTAIN; }; out_packet_reconstruct (pkt : vr_enet_packet) is only { -- Perform checks, match in scoreboard }; extend vr_enet_env { // add tcm to monitor inputs and update packet status // from UNCERTAIN to PENDING if appropriate };

Experiences of using the OVM e scoreboard • Easy to import and adapt • Predicting which packets get dropped is hard • Ethernet can silently drop packets! • Difficult to align with packet boundaries from eVC • The DUT has windows of time for errors • We may or may not lose the link • We therefore slackened off the scoreboard • With the risk of missing errors

Integrating verification environments in VManager CMS vsif file Internal vsif file Apply internal perspective Merge vsif files Target vsif file

Integrating verification results using VManager CMS vsof files Internal vsof files Merge Single vsof file

Results Coverage low because MAC in static cfg Coverage low because did not merge in MAC cvge • Mutation • The designer inserted a number of bugs in the design • The test bench found them all

Conclusions • The eVC was easy to install and connect • Comprehensive assertions related to IEEE spec • The CMS functional coverage targets • Comprehensive and easy to adapt for our perspective • Easy to integrate with our coverage targets (VManager) • The CMS tests • good coverage and were easy to extend • Ethernet scoreboarding is hard to predict • Easy to merge CMS and internal coverage • Merge functional and code coverage

Integrating Ethernet CMS with Internal Verification Environments