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This course covers advanced digital design concepts, including counters, state machines, memory basics, and computer design fundamentals. It emphasizes practical application and lab work to reinforce theoretical knowledge. Students will explore a range of digital design topics through lectures, tutorials, assignments, and hands-on experiments. The course aims to enhance students' ability to analyze and construct digital circuits, preparing them for real-world applications. Various teaching resources and software tools will be utilized to facilitate learning and experimentation. Join us for an engaging and challenging educational experience in the realm of digital electronics.
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EMT 221 / 4 DIGITAL PRINCIPLES II FIRST DAY SLIDES
Lecturer: • Pn. Norinabt.Idris • Jejawi Block A, Level 1 • 04 – 9798387 • 012 – 4037775 • norina@unimap.edu.my PLVs: • En. Roslin bin Jamaluddin • Pn. Norlidabt. Abu Bakar
Grading: 50% - Final exam 20% - Tests 30% - Course Work Lab = 20% Tutorial/Assignment/Quizzes = 10%
Course Outcomes (COs) • CO1: Ability to define and identify digital design • concepts. • CO2: Ability to construct and analyze various types of counters; to interpret state tables, state diagrams (Finite State Machines, FSM): Mealy & Moore, and Algorithmic State Machines (ASM) charts; and to construct sequential circuit designs. • CO3: Ability to recognize and describe the basic concepts of memory used in digital circuits; to describe the principles of Datapath, Arithmetic Logic Units (ALU), Shifter and Control Word; and to construct a simple ALU.
Main Text Book: • Digital Electronics Design, Prentice Hall. • Price = RM 58. • Available at Union Bookstore, Taman Sena, Kangar. • Used in Digital I & Digital II.
Other References: • Digital Fundamentals, Floyd, Prentice Hall. • Digital Principles and Design, Donald D. Givone, McGraw-Hill, 2002. • Digital Design – Principles and Practices 4th Ed., John F. Wakerley, Prentice Hall, 2007. • Fundamentals of Digital Logic with Verilog/VHDL Design, Stephen Brown and ZvonkoVranesic, McGraw Hill 2009.
OUTLINE Chapter 1 : Digital Design Concepts Chapter 2: Counters Chapter 3: Finite State Machines Chapter 4: Algorithmic State Machines Chapter 5: Memory Basics Chapter 6: Computer Design Basics
Important Dates • Test 1 • 3 September, Friday • Test 2 • 22 October, Friday
EXPERIMENTS • Lab 1 -- Combinational Design • Lab 2 -- Hierarchical Design • Lab 3 -- Design of Counters • Lab 4 -- Design using Finite State Machine, FSM • Lab 5 -- Project Design
What to expect & do … In Class • To do: • Sign up the attendance sheet • Do not be NOisY.. • Pay attention • To expect (and contribute 10%): • Surprise quizzes • In-class assignments
What to do after class … • Read the textbook • Tutorial/Assignment Questions • Answer the given questions
What to do BEfore lab … • Download the lab sheet and relevant materials from portal. • Read the lab sheet and do the theoretical preparations. • Watch oUTiF the leCturer gives lab tips during the lecture.
What to expect & do … In Lab • To Bring: • The lab sheet (well-prepared) • Relevant manuals & guides given in portal • The text book • The Lecture slides .. Esp. the lab tips slides (if available) • To do: • Do your oWn work .. • Do not cOPy others…
The eND of sEmester cHallenGe… • The fiNaLeXaM !!!
Introduction to Lab Quartus II software (Altera)
Quartus II • It is a Computer Aided Design (CAD) tool to create logic circuits. • It can work on simulation through waveform generator OR • It can be programmed/ • downloaded to an Altera UP (Univ. Prog.) board or DE board. Connect using byte blaster cable