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Crusoe CPU: Innovative VLIW Processor Design

Explore Transmeta's Crusoe CPU, featuring X86 compatibility, VLIW hardware, low power consumption, and unique Code Morphing technology for efficient performance. Learn about its novel architecture and benefits for X86 applications and operating systems.

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Crusoe CPU: Innovative VLIW Processor Design

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  1. Transmeta’s New Processor Another way to design CPU By Wu Cheng Meng @csie.ccu.edu.tw

  2. What’s Crusoe CPU • X86 ISA Compatible • Simple VLIW Hardware • Software/Hardware Mixed Architecture • Low Power • Self-Turning of Clock & Voltage

  3. Structure

  4. Structure X86 Applications X86 Operating System X86 BIOS Code Morphing Software VLIW Processor

  5. 128 bit molecule [F]ADD ADD LD BRCC VLIW Hardware • 64/128 bits molecule • 2 Integer, 1 Float, 1 LD/ST, 1 Branch • Optimized for simple, fast and low-power

  6. Code Morphing Layer • Started When Boot • Translate/Optimize ISA to Native ISA • Insert Instrument Code to … • Execute path analysis • Detect CPU need for efficient power consuming • Any other analysis ..

  7. Code Morphing Layer Physical Memory on main-board 8-16M Code Morph itself And Translated Code Cache Virtual Physical Memory BIOS and OS can see

  8. Translation Step • Interpretation • Translate one instruction at a time • Simple-minded • Optimize Code that Compilers do • Highly Optimized • Reorder the instructions and make parallelism

  9. Special Issues for X86 • Generate Same Condition Code • Operates same 80-bit floating point • TLB has same protection bits • TLB address mapping as X86 processors

  10. Precise Interrupt • Precise Interrupt • Shadow Registers (int / fp) • Gated Store Buffer • Commit Operation • Rollback Operation

  11. Alias Hardware • Alias Hardware (Memory) • Reorder limited by load/store pairs • Load-and-protect • Save address and size of loaded data • Store-Under-Alias-Mask • Check alias hardware • Raise exception when overwrite

  12. Example of Alias ld %r30, [%x] // first load from location x … st %data, [%y] // might overwrite location x ld %r31, [%x] // this accesses location X again use %31 ldp %r30, [%x] // load from location x and protect it … stam %data, [%y] // traps if it writes x use %30 // may use data from first load

  13. Self-Modifying Code • Keep a “translated” bit in MMU • When a protected page is written • Invalidate the affected translation(s)

  14. Low Power!!! Reduced Power Consumption mainly by reduced x86 decode logic Pentium!!! Crusoe

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