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Astrium Use Case

Astrium Use Case. Main Objectives. Improvement of our skills in HW/SW codesign methods/technologies Explore and identify the optimal architecture for a given algorithm How to verify real time determinism ? How to debug a SoC ?

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Astrium Use Case

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  1. Astrium Use Case

  2. Main Objectives • Improvement of our skills in HW/SW codesign methods/technologies • Explore and identify the optimal architecture for a given algorithm • How to verify real time determinism ? • How to debug a SoC ? • Definition of the different types of models required at each step of the design flow • Evaluation of the use of HW models obtained from a HW design flow, to be used in computer simulators for the integration and validation of critical embedded SW. (Representativity improvement and cost reduction) • Define an tool-aided flow that helps collaboration between different teams • Support to requirements traceability Workshop - November 2011

  3. Image Processing « starrer » Moving objects extraction Moving objects tracking Lossless compression MatLab Models Image 1000x1000 -> 10000x10000 10 Hz 100Mb/s of telemetry allocation Telemetry bandwidth needs reduction Guidance/Navigation/Control Functional Architecture Workshop - November 2011

  4. Main Processing Steps • Image Registration: computation of the geometrical model of image distortion thanks to image correlation and re-sampling, • Image Fusion: data volume reduction by eliminating inter-images redundancies. • Stabilization: compensation for pan and tilt of the sensor by a new image re-sampling • Basically, serial processing but pipelining solution are investigated Workshop - November 2011

  5. Architectures ciblées µP + custom HW blocks HW in charge of a full transformation(algorithm step) Pipelining performed between SW stages and HW stages µP + custom HW operators SW in charge of the full algorithm by using shared HW operators to accelerate the processing Workshop - November 2011

  6. Evaluation Criteria (1) • Design Space Exploration with performance profiling (functional, resource usage, power consumption, ...) • HW functions fast prototyping thanks to HLS • Skeleton generation from IP-XACT Description • HW/SW co-simulation: • HW/SW interface validation • Representative virtual platform for SW development, debug and validation • Automatic documentation generation from models (HW and SW) • Static and dynamic Analysis methods and tools to check real time constraints conformance Workshop - November 2011

  7. Evaluation Criteria (2) Questions to be answered • What can be verified and validated at each abstraction level of modelling (and compliant with ECSS) ? • What is the position/role of IP-XACT description (only for assembling or the Central Data Base of all the design process) Workshop - November 2011

  8. Use Case Process • Algorithm Functional Modelling with Matlab • Algorithmic C Model (today coded by hand) • C Model update for HLS usage • HW/SW partitioning • Parallelism extraction • In parallel, developing SystemC/TLM Toolbox (ISS, DMA, Memory Controllers, Traffic Generator, Fault Injection Engines) • Automatic generation of SC/TLM & OBSW skeletons & documentation • Coding of the behavioural parts • Using assertion-based verification applied on given IPs • Assembling the Virtual Platform • Real Time SW constraint verification with WCET Tools • Implementing requirements traceability through the overall process Workshop - November 2011

  9. Thank you for your attention ? ? ? Any questions ? Workshop - November 2011

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