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Network Coprocessor (NETCP) Overview

Network Coprocessor (NETCP) Overview. Agenda. What is NETCP? Purpose of the NETCP NETCP Block Diagram Internet Protocol Classification Levels Communication with the NETCP. NETCP Subsystem Overview. What is NETCP? Purpose of the NETCP NETCP Block Diagram

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Network Coprocessor (NETCP) Overview

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  1. Network Coprocessor (NETCP)Overview

  2. Agenda • What is NETCP? • Purpose of the NETCP • NETCP Block Diagram • Internet Protocol Classification Levels • Communication with the NETCP

  3. NETCP Subsystem Overview What is NETCP? Purpose of the NETCP NETCP Block Diagram Internet Protocol Classification Levels Communication with the NETCP

  4. Application-Specific Memory Subsystem Coprocessors MSM 64-Bit SRAM DDR3 EMIF MSMC Debug & Trace Boot ROM Semaphore C66x™ CorePac Power Management PLL L1 L1 P-Cache D-Cache x3 L2 Cache EDMA 1 to 8 Cores @ up to 1.25 GHz x3 TeraNet HyperLink Multicore Navigator Queue Packet Manager DMA x4 x2 - t O n e s h / o T I r n i I c Security t c e R r C t h P i a f e i O Accelerator h c e i A c 2 I S I i c I w t h l t C e U i p R t S O p p w P E S S A Packet S Accelerator I I x2 M G S Network Coprocessor What is the Network Coprocessor (NETCP)? Network Coprocessor consists of the following modules: • Packet Accelerator (PA) • Security Accelerator (SA) • Ethernet Subsystem • Packet DMA (PKTDMA) Controller

  5. Purpose of the Network Coprocessor • MotivationbehindNETCP: • UsehardwareacceleratorstodoL2,L3,andL4processingandencryptionthatwaspreviouslyrequiredtobedoneinsoftware • GoalsforbothPacketAcceleratorandSecurityAccelerator: • OffloadDSPprocessingpower • Improvesystemintegration • Allowcostsavingsatthesystemlevel • ExpandDSPusabilitywithincurrentproducts • AllowDSPusageinnewproductareas • SecurityKeyapplications: • IPSectunnelendpoint(e.g.LTEeNB,...) • SecureRTP(SRTP)betweengateways • Airinterface(3GPP,Wimax)securityprocessing

  6. NETCP Block Diagram Config 32-bits 32-bit VBUSP TeraNet SCR CPU/3 CFG TeraNet SCR PKTDMAController PKTDMAController Pass 1 LUT PDSP+1 Timer16 1 PKTDMA_VBUSM_TXRX 128 bits CDE Timer16 2 32-bit VBUSP TeraNet SCR Pass 1 LUT PDSP+2 Timer16 3 Streaming Interface Switch CPU/3 Main TeraNet SCR CDE Timer16 4 Pass 1 LUT PDSP+3 Timer16 5 CP_ACESecurity Unit CP_ACESecurity Unit CDE Timer16 6 Pass 2 LUT PDSP+4 PDSPScratchpad RAM 1 CDE PDSP+5 PDSPScratchpad RAM 2 Switch Status INTS CDE . : PDSP+6 3-PortEthernetSwitch SERDES CPSGMII SGMII 0 PDSPScratchpad RAM n CDE SERDES CPSGMII SGMII 1 CPMDIO MDIO 0 INTS PAStats INTD

  7. Packet DMA in NETCP FFTC (B) Queue Manager Subsystem SRIO FFTC (A) Queue Manager PKTDMA 0 1 PKTDMA 2 PKTDMA 3 4 5 . . . 8192 AIF Network Coprocessor PKTDMA PKTDMA PKTDMA

  8. Internet Protocol Classification Layers • Layer 2 (L2): Media Access Control (MAC) Layer • IEEE 802.3 standard • Layer 3 (L3): Internet Layer • Internet Protocol Version 4 (IPv4) • Internet Protocol Version 6 (IPv6) • Custom L3 Classification • Layer 4 (L4): Transport Layer • User Datagram Protocol (UDP) • Transmission Control Protocol (TCP) • Custom L4 Classification Example Packet L2 L3 L4 Data MAC IPv4 UDP Payload

  9. Communication with the NETCP NETCP relies on QMSS and PKTDMA to communicate with the CorePac. • TX Queue Mapping • Q640: PDSP1 • Q641: PDSP2 • Q642: PDSP3 • Q643: PDSP4 • Q644: PDSP5 • Q645: PDSP6 • Q646: SASS0 • Q647: SASS1 • Q648: Switch • RX Queues • Can use any general purpose queues (Q864-Q8191) • Can also use other special purpose queues (e.g. 704-735) PKTDMA TX channels mapped to QMSS PA TX queues

  10. For More Information For more information, refer to the Network Coprocessor (NETCP) User Guide.http://www.ti.com/lit/SPRUGZ6 For questions regarding topics covered in this training, visit the support forums at the TI E2E Community website.

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