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SIMPLE PHASE LOCKED LOOP

SIMPLE PHASE LOCKED LOOP. PRESENTED BY :- Vivek Pathak (1409904) Abhishek Solanki (1409905) Varad Kinjal Pooja. What is PLL?. PLL = Phase Lock Loop

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SIMPLE PHASE LOCKED LOOP

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  1. SIMPLE PHASE LOCKED LOOP PRESENTED BY:- Vivek Pathak (1409904) AbhishekSolanki (1409905) Varad Kinjal Pooja

  2. What is PLL? • PLL = Phase Lock Loop • A circuit which synchronizes an adjustable oscillator with another oscillator by the comparison of phase between the two signals. • An electronic circuit that synchronizes itself to an external reference signal.

  3. What is it for? • To generate High Frequency Clock in Microprocessor. • In Mobile Communication to generate Carrier Frequency. • Can you think of any other Application? Actually there are many.

  4. Parts of a PLL • Phase Detector • Filter • Voltage Controlled Oscillator

  5. Parts of a PLL • Phase Detector • Acts as comparator • Produces a voltage proportional to the phase difference between input and output signal • Voltage becomes a control signal

  6. Implementation of PD • Phase Detector is an XOR gate.

  7. Parts of a PLL • Filter • Determines dynamic characteristics of PLL • Specify Capture Range (bandwidth) • Specify Tracking Range • Receives signal from Phase Detector and filters accordingly

  8. Parts of a PLL • Voltage Controlled Oscillator • Set tuning range • Set noise margin • Creates low noise clock oscillation Wout = Wo+Kvco Vcont

  9. Locked Condition • Locked Condition d/dt(φin-φout)=0 This implies that win = wout

  10. Vi and Vout has at the same frequency W1 • The phase detector must produce V1 • Hence, VCO is dynamically changing and PD is creating VControl to adjust for the phase difference. • The PLL is in the Locked state

  11. Application of PLL • Frequency Multiplications The feedback loop has frequency division. Frequency division is implemented using a counter.

  12. Jitter Reduction • Clock Skew Reduction Buffers are used to distribute the clock Embed the buffer within the loop

  13. Other applications include: • Demodulation of both FM and AM signals • Recovery of small signals that otherwise would be lost in noise (lock-in amplifier) • Recovery of clock timing information from a data stream such as from a disk drive • Clock multipliers in microprocessors that allow internal processor elements to run faster than external connections, while maintaining precise timing relationships • DTMF decoders, modems, and other tone decoders, for remote control and telecommunications

  14. THANK YOU

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